u-boot/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
Sergiu Moga 2df729e96d ARM: dts: at91: sama5: Align with Linux Devicetree
This patch makes sure that the Devicetree for the sama5
boards are aligned with the Devicetree from Linux. This
implies removing the GPIO compatible and replacing it
with the PINCTRL one, as well as unifying the SDMMC
pinctrl related subnodes under one single subnode.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2022-09-19 09:51:04 +03:00

149 lines
3.3 KiB
Text

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* at91-sama5d27_wlsom1_ek.dts - Device Tree file for SAMA5D27 WLSOM1 EK
*
* Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries
*
* Author: Nicolas Ferre <nicolas.ferre@microcihp.com>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "sama5d27_wlsom1.dtsi"
/ {
model = "Microchip SAMA5D27 WLSOM1 EK";
compatible = "microchip,sama5d27-wlsom1-ek", "microchip,sama5d27-wlsom1", "atmel,sama5d2", "atmel,sama5";
chosen {
stdout-path = &uart0;
};
onewire_tm: onewire {
gpios = <&pioA PIN_PC9 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_onewire_tm_default>;
status = "okay";
w1_eeprom: w1_eeprom@0 {
compatible = "maxim,ds24b33";
status = "okay";
};
};
ahb {
sdmmc0: sdio-host@a0000000 {
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc0_default>;
status = "okay";
};
apb {
hlcdc: hlcdc@f0000000 {
atmel,vl-bpix = <4>;
atmel,output-mode = <24>;
atmel,guard-time = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>;
status = "okay";
display-timings {
800x480 {
clock-frequency = <33300000>;
xres = <800>;
yres = <480>;
hactive = <800>;
vactive = <480>;
hsync-len = <64>;
hfront-porch = <1>;
hback-porch = <64>;
vfront-porch = <1>;
vback-porch = <22>;
vsync-len = <23>;
};
};
};
qspi1: spi@f0024000 {
status = "okay";
};
macb0: ethernet@f8008000 {
status = "okay";
};
uart0: serial@f801c000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0_default>;
status = "okay";
};
pioA: pinctrl@fc038000 {
pinctrl_lcd_base: pinctrl_lcd_base {
pinmux = <PIN_PC30__LCDVSYNC>,
<PIN_PC31__LCDHSYNC>,
<PIN_PD1__LCDDEN>,
<PIN_PD0__LCDPCK>;
bias-disable;
};
pinctrl_lcd_pwm: pinctrl_lcd_pwm {
pinmux = <PIN_PC28__LCDPWM>;
bias-disable;
};
pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 {
pinmux = <PIN_PC10__LCDDAT2>,
<PIN_PC11__LCDDAT3>,
<PIN_PC12__LCDDAT4>,
<PIN_PC13__LCDDAT5>,
<PIN_PC14__LCDDAT6>,
<PIN_PC15__LCDDAT7>,
<PIN_PC16__LCDDAT10>,
<PIN_PC17__LCDDAT11>,
<PIN_PC18__LCDDAT12>,
<PIN_PC19__LCDDAT13>,
<PIN_PC20__LCDDAT14>,
<PIN_PC21__LCDDAT15>,
<PIN_PC22__LCDDAT18>,
<PIN_PC23__LCDDAT19>,
<PIN_PC24__LCDDAT20>,
<PIN_PC25__LCDDAT21>,
<PIN_PC26__LCDDAT22>,
<PIN_PC27__LCDDAT23>;
bias-disable;
};
pinctrl_sdmmc0_default: sdmmc0_default {
cmd_data {
pinmux = <PIN_PA1__SDMMC0_CMD>,
<PIN_PA2__SDMMC0_DAT0>,
<PIN_PA3__SDMMC0_DAT1>,
<PIN_PA4__SDMMC0_DAT2>,
<PIN_PA5__SDMMC0_DAT3>;
bias-disable;
};
ck_cd_vddsel {
pinmux = <PIN_PA0__SDMMC0_CK>,
<PIN_PA11__SDMMC0_VDDSEL>,
<PIN_PA12__SDMMC0_WP>,
<PIN_PA13__SDMMC0_CD>;
bias-disable;
};
};
pinctrl_uart0_default: uart0_default {
pinmux = <PIN_PB26__URXD0>,
<PIN_PB27__UTXD0>;
bias-disable;
};
pinctrl_onewire_tm_default: onewire_tm_default {
pinmux = <PIN_PC9__GPIO>;
bias-pull-up;
};
};
};
};
};