mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-16 01:38:22 +00:00
49822e23a0
- DDR Ram support for PM520 (MPC5200) - support for different flash types (PM520) - USB / IDE / CF-Card / DiskOnChip support for PM520 - 8 bit boot rom support for PM520/CE520 - Add auto SDRAM module detection for MicroSys CPC45 board (MPC8245) - I2C and RTC support for CPC45 - support of new flash type (28F160C3T) for CPC45
185 lines
5.3 KiB
C
185 lines
5.3 KiB
C
/*
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* include/configs/mx1ads.h
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*
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* (c) Copyright 2004
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* Techware Information Technology, Inc.
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* http://www.techware.com.tw/
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*
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* Ming-Len Wu <minglen_wu@techware.com.tw>
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*
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* This is the Configuration setting for Motorola MX1ADS board
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* If we are developing, we might want to start armboot from ram
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* so we MUST NOT initialize critical regs like mem-timing ...
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*/
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#define CONFIG_INIT_CRITICAL /* undef for developing */
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
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#define CONFIG_MC9328 1 /* It's a Motorola MC9328 SoC */
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#define CONFIG_MX1ADS 1 /* on a Motorola MX1ADS Board */
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#define BOARD_LATE_INIT 1
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#define USE_920T_MMU 1
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#if 0
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#define CFG_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */
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#define CFG_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */
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#define CFG_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */
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#endif
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/*
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* Size of malloc() pool
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*/
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#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
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#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
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/*
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* CS8900 Ethernet drivers
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*/
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#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
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#define CS8900_BASE 0x15000300
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#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
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/*
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* select serial console configuration
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*/
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#define CONFIG_UART1 1
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/* #define CONFIG_UART2 1 */
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#define CONFIG_BAUDRATE 115200
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/***********************************************************
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* Command definition
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***********************************************************/
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#define CONFIG_COMMANDS \
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(CONFIG_CMD_DFL | \
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CFG_CMD_CACHE | \
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/*CFG_CMD_NAND |*/ \
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/*CFG_CMD_EEPROM |*/ \
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/*CFG_CMD_I2C |*/ \
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/*CFG_CMD_USB |*/ \
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CFG_CMD_REGINFO | \
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CFG_CMD_ELF)
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/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
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#include <cmd_confdefs.h>
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTARGS "root=/dev/docbp mem=48M"
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#define CONFIG_ETHADDR 08:00:3e:26:0a:5c
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_IPADDR 192.168.0.22
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#define CONFIG_SERVERIP 192.168.0.11
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#define CONFIG_BOOTFILE "mx1ads"
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/*#define CONFIG_BOOTCOMMAND "tftp; bootm" */
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#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
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/* what's this ? it's not used anywhere */
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#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
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#endif
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/*
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* Miscellaneous configurable options
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*/
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#define CFG_HUSH_PARSER 1
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#define CFG_PROMPT_HUSH_PS2 "> "
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#define CFG_LONGHELP /* undef to save memory */
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#ifdef CFG_HUSH_PARSER
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#define CFG_PROMPT "MX1ADS$ " /* Monitor Command Prompt */
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#else
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#define CFG_PROMPT "MX1ADS=> " /* Monitor Command Prompt */
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#endif
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
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/* Print Buffer Size */
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#define CFG_MAXARGS 16 /* max number of command args */
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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#define CFG_MEMTEST_START 0x09000000 /* memtest works on */
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#define CFG_MEMTEST_END 0x0AF00000 /* 63 MB in DRAM */
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#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
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#define CFG_LOAD_ADDR 0x08800000 /* default load address */
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#define CFG_HZ 1000
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/* valid baudrates */
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/*-----------------------------------------------------------------------
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* Stack sizes
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*
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
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#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
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#endif
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SDRAM */
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#define PHYS_SDRAM_1 0x08000000 /* SDRAM on CSD0 */
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#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
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#define CFG_MAX_FLASH_BANKS 1 /* 1 bank of SyncFlash */
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#define CFG_FLASH_BASE 0x0C000000 /* SyncFlash on CSD1 */
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#define FLASH_BANK_SIZE 0x01000000 /* 16 MB Total */
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CONFIG_SYNCFLASH 1
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#define PHYS_FLASH_SIZE 0x01000000
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#define CFG_MAX_FLASH_SECT (16)
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#define CFG_ENV_ADDR (CFG_FLASH_BASE+0x00ff0000)
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#define CFG_ENV_IS_IN_FLASH 1
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#define CFG_ENV_SIZE 0x0f000 /* Total Size of Environment Sector */
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#define CFG_ENV_SECT_SIZE 0x100000
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#endif /* __CONFIG_H */
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