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https://github.com/AsahiLinux/u-boot
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558d10620b
Add board code for R8A779F0 S4 Spider board.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Synchronize configuration symbols which are now switched to Kconfig
Mallocate gd->bd->bi_boot_params, i.e. drop the assignment
Sort headers, use clrbits_le32(), use BIT macros where appropriate
Use CONFIG_SYS_CLK_FREQ for counter frequency instead of custom macro]
72 lines
1.3 KiB
C
72 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* board/renesas/spider/spider.c
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* This file is Spider board support.
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*
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* Copyright (C) 2021 Renesas Electronics Corp.
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*/
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#include <common.h>
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#include <asm/arch/rmobile.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/mach-types.h>
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#include <asm/processor.h>
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#include <asm/system.h>
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#include <linux/errno.h>
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DECLARE_GLOBAL_DATA_PTR;
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static void init_generic_timer(void)
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{
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const u32 freq = CONFIG_SYS_CLK_FREQ;
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/* Update memory mapped and register based freqency */
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asm volatile ("msr cntfrq_el0, %0" :: "r" (freq));
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writel(freq, CNTFID0);
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/* Enable counter */
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setbits_le32(CNTCR_BASE, CNTCR_EN);
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}
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static void init_gic_v3(void)
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{
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/* GIC v3 power on */
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writel(BIT(1), GICR_LPI_PWRR);
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/* Wait till the WAKER_CA_BIT changes to 0 */
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clrbits_le32(GICR_LPI_WAKER, BIT(1));
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while (readl(GICR_LPI_WAKER) & BIT(2))
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;
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writel(0xffffffff, GICR_SGI_BASE + GICR_IGROUPR0);
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}
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void s_init(void)
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{
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if (current_el() == 3)
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init_generic_timer();
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}
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int board_early_init_f(void)
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{
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/* Unlock CPG access */
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writel(0x5A5AFFFF, CPGWPR);
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writel(0xA5A50000, CPGWPCR);
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return 0;
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}
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int board_init(void)
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{
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if (current_el() == 3)
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init_gic_v3();
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return 0;
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}
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void reset_cpu(void)
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{
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writel(RST_SPRES, RST_SRESCR0);
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}
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