mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-25 06:00:43 +00:00
11d14bfb75
Add QSPI Secure Boot target to enable chain of trust Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
80 lines
1.7 KiB
C
80 lines
1.7 KiB
C
/*
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* Copyright 2016 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __LS1012ARDB_H__
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#define __LS1012ARDB_H__
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#include "ls1012a_common.h"
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/* DDR */
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#define CONFIG_DIMM_SLOTS_PER_CTLR 1
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#define CONFIG_CHIP_SELECTS_PER_CTRL 1
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#define CONFIG_NR_DRAM_BANKS 2
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#define CONFIG_SYS_SDRAM_SIZE 0x40000000
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#define CONFIG_CMD_MEMINFO
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#define CONFIG_CMD_MEMTEST
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END 0x9fffffff
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/*
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* USB
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*/
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#define CONFIG_HAS_FSL_XHCI_USB
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#ifdef CONFIG_HAS_FSL_XHCI_USB
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#define CONFIG_USB_XHCI_FSL
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
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#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
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#endif
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/*
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* I2C IO expander
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*/
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#define I2C_MUX_IO1_ADDR 0x24
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#define __SW_BOOT_MASK 0xFC
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#define __SW_BOOT_EMU 0x10
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#define __SW_BOOT_BANK1 0x00
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#define __SW_BOOT_BANK2 0x01
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#define __SW_REV_MASK 0x07
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#define __SW_REV_A 0xF8
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#define __SW_REV_B 0xF0
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/* MMC */
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#ifdef CONFIG_MMC
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#define CONFIG_FSL_ESDHC
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#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
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#endif
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/* SATA */
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#define CONFIG_LIBATA
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#define CONFIG_SCSI
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#define CONFIG_SCSI_AHCI
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#define CONFIG_SCSI_AHCI_PLAT
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#define CONFIG_CMD_SCSI
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#define CONFIG_SYS_SATA AHCI_BASE_ADDR
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#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
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#define CONFIG_SYS_SCSI_MAX_LUN 1
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#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
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CONFIG_SYS_SCSI_MAX_LUN)
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#define CONFIG_PCIE1 /* PCIE controller 1 */
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#define CONFIG_NET_MULTI
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#define CONFIG_PCI_SCAN_SHOW
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#define CONFIG_CMD_PCI
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#define CONFIG_CMD_MEMINFO
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#define CONFIG_CMD_MEMTEST
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END 0x9fffffff
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#include <asm/fsl_secure_boot.h>
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#endif /* __LS1012ARDB_H__ */
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