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3ead92c571
Add header files for blackfin new processor bf60x. Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
80 lines
1.8 KiB
C
80 lines
1.8 KiB
C
/*
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* CGU Masks
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*/
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#ifndef __BFIN_PERIPHERAL_CGU__
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#define __BFIN_PERIPHERAL_CGU__
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/* CGU_CTL Masks */
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#define DF (1 << 0)
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#define MSEL (0x7f << MSEL_P)
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#define WIDLE (1 << WIDLE_P)
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#define LOCK (1 << LOCK_P)
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#define DF_P 0
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#define MSEL_P 8
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#define WIDLE_P 30
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#define LOCK_P 31
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#define MSEL_MASK 0x7F00
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#define DF_MASK 0x1
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/* CGU_STAT Masks */
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#define PLLEN (1 << 0)
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#define PLLBP (1 << 1)
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#define PLLLK (1 << 2)
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#define CLKSALGN (1 << 3)
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#define CCBF0EN (1 << 4)
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#define CCBF1EN (1 << 5)
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#define SCBF0EN (1 << 6)
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#define SCBF1EN (1 << 7)
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#define DCBFEN (1 << 8)
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#define OCBFEN (1 << 9)
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#define ADRERR (1 << 16)
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#define LWERR (1 << 17)
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#define DIVERR (1 << 18)
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#define WDFMSERR (1 << 19)
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#define WDIVERR (1 << 20)
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#define PLLLKERR (1 << 21)
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/* CGU_DIV Masks */
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#define CSEL (0x1f << CSEL_P)
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#define S0SEL (3 << S0SEL_P)
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#define SYSSEL (0x1f << SYSSEL_P)
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#define S1SEL (3 << S1SEL_P)
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#define DSEL (0x1f << DSEL_P)
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#define OSEL (0x7f << OSEL_P)
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#define ALGN (1 << ALGN_P)
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#define UPDT (1 << UPDT_P)
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#define LOCK (1 << LOCK_P)
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#define CSEL_P 0
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#define S0SEL_P 5
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#define SYSSEL_P 8
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#define S1SEL_P 13
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#define DSEL_P 16
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#define OSEL_P 22
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#define ALGN_P 29
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#define UPDT_P 30
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#define LOCK_P 31
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/* CGU_CLKOUTSEL Masks */
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#define CLKOUTSEL (0xf << 0)
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#define USBCLKSEL (0x3f << 16)
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#define LOCK (1 << LOCK_P)
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#define LOCK_P 31
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#define CLKOUTSEL_CLKIN 0x0
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#define CLKOUTSEL_CCLK 0x1
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#define CLKOUTSEL_SYSCLK 0x2
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#define CLKOUTSEL_SCLK0 0x3
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#define CLKOUTSEL_SCLK1 0x4
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#define CLKOUTSEL_DCLK 0x5
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#define CLKOUTSEL_USB_PLL 0x6
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#define CLKOUTSEL_OUTCLK 0x7
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#define CLKOUTSEL_USB_CLKIN 0x8
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#define CLKOUTSEL_WDOG 0x9
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#define CLKOUTSEL_PMON 0xA
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#define CLKOUTSEL_GND 0xB
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#endif
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