mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-09-23 16:11:54 +00:00
26f92be07e
We have common ddr types in rockchip or in general. So use the common ddr type names instead of per Rockchip SoC to avoid confusion. The respective ddr type names will use on the associated ddr SoC driver as these drivers are built per SoC at a time. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
74 lines
2 KiB
Text
74 lines
2 KiB
Text
CONFIG_ARM=y
|
|
CONFIG_SKIP_LOWLEVEL_INIT=y
|
|
CONFIG_COUNTER_FREQUENCY=24000000
|
|
CONFIG_ARCH_ROCKCHIP=y
|
|
CONFIG_TEXT_BASE=0x00200000
|
|
CONFIG_NR_DRAM_BANKS=1
|
|
CONFIG_ENV_OFFSET=0x3F8000
|
|
CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4s"
|
|
CONFIG_ROCKCHIP_RK3399=y
|
|
CONFIG_TARGET_EVB_RK3399=y
|
|
CONFIG_DEBUG_UART_BASE=0xFF1A0000
|
|
CONFIG_DEBUG_UART_CLOCK=24000000
|
|
CONFIG_SYS_LOAD_ADDR=0x800800
|
|
CONFIG_DEBUG_UART=y
|
|
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
|
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
|
|
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4s.dtb"
|
|
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
|
CONFIG_SPL_MAX_SIZE=0x2e000
|
|
CONFIG_SPL_PAD_TO=0x7f8000
|
|
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
|
|
CONFIG_SPL_BSS_START_ADDR=0x400000
|
|
CONFIG_SPL_BSS_MAX_SIZE=0x2000
|
|
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
|
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
|
CONFIG_SPL_STACK=0x400000
|
|
CONFIG_SPL_STACK_R=y
|
|
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
|
|
CONFIG_TPL=y
|
|
CONFIG_CMD_BOOTZ=y
|
|
CONFIG_CMD_GPT=y
|
|
CONFIG_CMD_MMC=y
|
|
CONFIG_CMD_USB=y
|
|
# CONFIG_CMD_SETEXPR is not set
|
|
CONFIG_CMD_TIME=y
|
|
CONFIG_SPL_OF_CONTROL=y
|
|
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
|
CONFIG_ENV_IS_IN_MMC=y
|
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
CONFIG_ROCKCHIP_GPIO=y
|
|
CONFIG_SYS_I2C_ROCKCHIP=y
|
|
CONFIG_MMC_DW=y
|
|
CONFIG_MMC_DW_ROCKCHIP=y
|
|
CONFIG_MMC_SDHCI=y
|
|
CONFIG_MMC_SDHCI_ROCKCHIP=y
|
|
CONFIG_ETH_DESIGNWARE=y
|
|
CONFIG_GMAC_ROCKCHIP=y
|
|
CONFIG_PMIC_RK8XX=y
|
|
CONFIG_REGULATOR_PWM=y
|
|
CONFIG_REGULATOR_RK8XX=y
|
|
CONFIG_PWM_ROCKCHIP=y
|
|
CONFIG_RAM_ROCKCHIP_LPDDR4=y
|
|
CONFIG_BAUDRATE=1500000
|
|
CONFIG_DEBUG_UART_SHIFT=2
|
|
CONFIG_SYS_NS16550_MEM32=y
|
|
CONFIG_SYSRESET=y
|
|
CONFIG_USB=y
|
|
CONFIG_USB_XHCI_HCD=y
|
|
CONFIG_USB_XHCI_DWC3=y
|
|
CONFIG_USB_EHCI_HCD=y
|
|
CONFIG_USB_EHCI_GENERIC=y
|
|
CONFIG_USB_KEYBOARD=y
|
|
CONFIG_USB_HOST_ETHER=y
|
|
CONFIG_USB_ETHER_ASIX=y
|
|
CONFIG_USB_ETHER_ASIX88179=y
|
|
CONFIG_USB_ETHER_MCS7830=y
|
|
CONFIG_USB_ETHER_RTL8152=y
|
|
CONFIG_USB_ETHER_SMSC95XX=y
|
|
CONFIG_VIDEO=y
|
|
CONFIG_DISPLAY=y
|
|
CONFIG_VIDEO_ROCKCHIP=y
|
|
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
|
|
CONFIG_SPL_TINY_MEMSET=y
|
|
CONFIG_ERRNO_STR=y
|