mirror of
https://github.com/AsahiLinux/u-boot
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132 lines
3.4 KiB
C
132 lines
3.4 KiB
C
/*
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* (C) Copyright 2007
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* Michael Schwingen, michael@schwingen.org
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*
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* (C) Copyright 2006
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* (C) Copyright 2002
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* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <malloc.h>
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#include <asm/arch/ixp425.h>
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#include <miiphy.h>
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#include "actux4_hw.h"
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DECLARE_GLOBAL_DATA_PTR;
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int board_init (void)
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{
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gd->bd->bi_arch_number = MACH_TYPE_ACTUX4;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = 0x00000100;
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GPIO_OUTPUT_CLEAR (CFG_GPIO_nPWRON);
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GPIO_OUTPUT_ENABLE (CFG_GPIO_nPWRON);
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GPIO_OUTPUT_CLEAR (CFG_GPIO_IORST);
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GPIO_OUTPUT_ENABLE (CFG_GPIO_IORST);
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/* led not populated on board*/
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GPIO_OUTPUT_ENABLE (CFG_GPIO_LED3);
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GPIO_OUTPUT_SET (CFG_GPIO_LED3);
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/* middle LED */
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GPIO_OUTPUT_ENABLE (CFG_GPIO_LED2);
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GPIO_OUTPUT_SET (CFG_GPIO_LED2);
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/* right LED */
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/* weak pulldown = LED weak on */
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GPIO_OUTPUT_DISABLE (CFG_GPIO_LED1);
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GPIO_OUTPUT_SET (CFG_GPIO_LED1);
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/* Setup GPIO's for Interrupt inputs */
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GPIO_OUTPUT_DISABLE (CFG_GPIO_USBINTA);
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GPIO_OUTPUT_DISABLE (CFG_GPIO_USBINTB);
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GPIO_OUTPUT_DISABLE (CFG_GPIO_USBINTC);
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GPIO_OUTPUT_DISABLE (CFG_GPIO_RTCINT);
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GPIO_OUTPUT_DISABLE (CFG_GPIO_PCI_INTA);
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GPIO_OUTPUT_DISABLE (CFG_GPIO_PCI_INTB);
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GPIO_INT_ACT_LOW_SET (CFG_GPIO_USBINTA);
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GPIO_INT_ACT_LOW_SET (CFG_GPIO_USBINTB);
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GPIO_INT_ACT_LOW_SET (CFG_GPIO_USBINTC);
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GPIO_INT_ACT_LOW_SET (CFG_GPIO_RTCINT);
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GPIO_INT_ACT_LOW_SET (CFG_GPIO_PCI_INTA);
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GPIO_INT_ACT_LOW_SET (CFG_GPIO_PCI_INTB);
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/* Setup GPIO's for 33MHz clock output */
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*IXP425_GPIO_GPCLKR = 0x011001FF;
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GPIO_OUTPUT_ENABLE (CFG_GPIO_EXTBUS_CLK);
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GPIO_OUTPUT_ENABLE (CFG_GPIO_PCI_CLK);
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*IXP425_EXP_CS1 = 0xbd113c42;
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udelay (10000);
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GPIO_OUTPUT_SET (CFG_GPIO_IORST);
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udelay (10000);
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GPIO_OUTPUT_CLEAR (CFG_GPIO_IORST);
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udelay (10000);
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GPIO_OUTPUT_SET (CFG_GPIO_IORST);
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return 0;
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}
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/* Check Board Identity */
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int checkboard (void)
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{
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puts ("Board: AcTux-4\n");
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return (0);
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}
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int dram_init (void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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return (0);
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}
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/*
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* Hardcoded flash setup:
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* Flash 0 is a non-CFI SST 39VF020 flash, 8 bit flash / 8 bit bus.
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* Flash 1 is an Intel *16 flash using the CFI driver.
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*/
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ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
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{
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if (banknum == 0) { /* non-CFI boot flash */
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info->portwidth = 1;
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info->chipwidth = 1;
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info->interface = FLASH_CFI_X8;
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return 1;
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} else
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return 0;
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}
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