u-boot/drivers/phy/marvell/sata.h
Stefan Roese c0132f6005 drivers/phy: Add Marvell SerDes / PHY drivers used on Armada 7K/8K
This version is based on the Marvell U-Boot version with this patch
applied as latest patch:

Git ID 7f408573: "fix: comphy: cp110: add comphy initialization for usb
device mode" from 2016-07-05.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
2016-09-27 17:29:54 +02:00

30 lines
967 B
C

/*
* Copyright (C) 2015-2016 Marvell International Ltd.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SATA_H_
#define _SATA_H_
/* SATA3 Unit address */
#define SATA3_VENDOR_ADDRESS 0xA0
#define SATA3_VENDOR_ADDR_OFSSET 0
#define SATA3_VENDOR_ADDR_MASK (0xFFFFFFFF << SATA3_VENDOR_ADDR_OFSSET)
#define SATA3_VENDOR_DATA 0xA4
#define SATA_CONTROL_REG 0x0
#define SATA3_CTRL_SATA0_PD_OFFSET 6
#define SATA3_CTRL_SATA0_PD_MASK (1 << SATA3_CTRL_SATA0_PD_OFFSET)
#define SATA3_CTRL_SATA1_PD_OFFSET 14
#define SATA3_CTRL_SATA1_PD_MASK (1 << SATA3_CTRL_SATA1_PD_OFFSET)
#define SATA3_CTRL_SATA1_ENABLE_OFFSET 22
#define SATA3_CTRL_SATA1_ENABLE_MASK (1 << SATA3_CTRL_SATA1_ENABLE_OFFSET)
#define SATA3_CTRL_SATA_SSU_OFFSET 23
#define SATA3_CTRL_SATA_SSU_MASK (1 << SATA3_CTRL_SATA_SSU_OFFSET)
#define SATA_MBUS_SIZE_SELECT_REG 0x4
#define SATA_MBUS_REGRET_EN_OFFSET 7
#define SATA_MBUS_REGRET_EN_MASK (0x1 << SATA_MBUS_REGRET_EN_OFFSET)
#endif /* _SATA_H_ */