Boschung, Rainer a09f470d49 kmp204x: set CPU watchdog reset reason flag ... Check the core timer status register (TSR) for watchdog reset, and and set the QRIO's reset reason flag REASON1[0] accordingly. This allows the appliction SW to identify the cpu watchdog as a reset reason, by setting the REASON1[0] flag in the QRIO. Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Reviewed-by: York Sun <yorksun@freescale.com>		2014-08-01 14:18:46 -07:00
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ddr.c	Driver/DDR: Moving Freescale DDR driver to a common driver	2013-11-25 11:43:43 -08:00
eth.c	mpc85xx: introduce the kmp204x reference design support	2013-10-24 09:36:26 -07:00
kmp204x.c	kmp204x: set CPU watchdog reset reason flag	2014-08-01 14:18:46 -07:00
kmp204x.h	kmp204x/qrio: prepare support for the CPU watchdog reset reason	2014-08-01 14:18:40 -07:00
law.c	mpc85xx: introduce the kmp204x reference design support	2013-10-24 09:36:26 -07:00
Makefile	kmp204x: introduce QRIO GPIO functions	2014-02-03 08:38:49 -08:00
pbi.cfg	kmp204x: add workaround for A-004849	2014-05-13 08:26:55 -07:00
pci.c	kmp204x: complete the reset sequence and PRST configuration	2014-05-13 08:26:55 -07:00
qrio.c	kmp204x/qrio: prepare support for the CPU watchdog reset reason	2014-08-01 14:18:40 -07:00
rcw_kmp204x.cfg	kmp204x: update the RCW	2014-05-13 08:26:55 -07:00
tlb.c	mpc85xx: introduce the kmp204x reference design support	2013-10-24 09:36:26 -07:00