Becky Bruce 7ea3871e06 MPC8xxx DDR: align informational prints ... Add spaces to cause the informational prints to line up with the ones from init_func_ram() in board.c. Output now looks like this: .... DRAM: Detected 4096 MB of memory This U-Boot only supports < 4G of DDR You could rebuild it with CONFIG_PHYS_64BIT DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off) .... The prints from lbc_sdram_init() have also been modified to line line up and changed to start with "LBC SDRAM" instead of the confusing "SDRAM". Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>		2011-01-14 01:32:19 -06:00
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common_timing_params.h	powerpc/8xxx: Enable DDR3 RDIMM support	2010-07-26 13:16:10 -05:00
ctrl_regs.c	Disable unused chip-select for DDR controller interleaving	2010-10-20 02:38:40 -05:00
ddr.h	powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4	2010-07-26 13:16:09 -05:00
ddr1_dimm_params.c	Move arch/ppc to arch/powerpc	2010-04-21 23:42:38 +02:00
ddr2_dimm_params.c	Enabled support for Rev 1.3 SPD for DDR2 DIMMs	2010-05-12 04:54:30 -05:00
ddr3_dimm_params.c	powerpc/8xxx: Enable DDR3 RDIMM support	2010-07-26 13:16:10 -05:00
lc_common_dimm_params.c	powerpc/8xxx: Enable DDR3 RDIMM support	2010-07-26 13:16:10 -05:00
main.c	MPC8xxx DDR: align informational prints	2011-01-14 01:32:19 -06:00
Makefile	Switch from archive libraries to partial linking	2010-11-17 21:02:18 +01:00
options.c	powerpc/8xxx: Improvement to DDR parameters	2010-07-26 13:16:10 -05:00
util.c	Move arch/ppc to arch/powerpc	2010-04-21 23:42:38 +02:00