mirror of
https://github.com/AsahiLinux/u-boot
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511fc86d0b
- Add SD secure boot target for ls1046ardb. - Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. - CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM (128K) where 32K are reserved for use by boot ROM and 6K for the header. - Reduce the size of CAAM driver for SPL Blobification functions and descriptors, that are not required at the time of SPL are disabled. Further error code conversion to strings is disabled for SPL build. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
310 lines
9.1 KiB
C
310 lines
9.1 KiB
C
/*
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* SEC Descriptor Construction Library
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* Basic job descriptor construction
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*
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* Copyright 2014 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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*/
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#include <common.h>
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#include <fsl_sec.h>
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#include "desc_constr.h"
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#include "jobdesc.h"
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#include "rsa_caam.h"
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#if defined(CONFIG_MX6) || defined(CONFIG_MX7)
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/*!
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* Secure memory run command
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*
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* @param sec_mem_cmd Secure memory command register
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* @return cmd_status Secure memory command status register
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*/
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uint32_t secmem_set_cmd(uint32_t sec_mem_cmd)
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{
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uint32_t temp_reg;
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ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
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uint32_t sm_vid = SM_VERSION(sec_in32(&sec->smvid));
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uint32_t jr_id = 0;
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sec_out32(CAAM_SMCJR(sm_vid, jr_id), sec_mem_cmd);
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do {
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temp_reg = sec_in32(CAAM_SMCSJR(sm_vid, jr_id));
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} while (temp_reg & CMD_COMPLETE);
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return temp_reg;
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}
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/*!
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* CAAM page allocation:
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* Allocates a partition from secure memory, with the id
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* equal to partition_num. This will de-allocate the page
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* if it is already allocated. The partition will have
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* full access permissions. The permissions are set before,
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* running a job descriptor. A memory page of secure RAM
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* is allocated for the partition.
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*
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* @param page Number of the page to allocate.
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* @param partition Number of the partition to allocate.
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* @return 0 on success, ERROR_IN_PAGE_ALLOC otherwise
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*/
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int caam_page_alloc(uint8_t page_num, uint8_t partition_num)
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{
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uint32_t temp_reg;
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ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
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uint32_t sm_vid = SM_VERSION(sec_in32(&sec->smvid));
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uint32_t jr_id = 0;
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/*
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* De-Allocate partition_num if already allocated to ARM core
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*/
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if (sec_in32(CAAM_SMPO_0) & PARTITION_OWNER(partition_num)) {
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temp_reg = secmem_set_cmd(PARTITION(partition_num) |
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CMD_PART_DEALLOC);
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if (temp_reg & SMCSJR_AERR) {
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printf("Error: De-allocation status 0x%X\n", temp_reg);
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return ERROR_IN_PAGE_ALLOC;
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}
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}
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/* set the access rights to allow full access */
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sec_out32(CAAM_SMAG1JR(sm_vid, jr_id, partition_num), 0xF);
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sec_out32(CAAM_SMAG2JR(sm_vid, jr_id, partition_num), 0xF);
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sec_out32(CAAM_SMAPJR(sm_vid, jr_id, partition_num), 0xFF);
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/* Now need to allocate partition_num of secure RAM. */
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/* De-Allocate page_num by starting with a page inquiry command */
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temp_reg = secmem_set_cmd(PAGE(page_num) | CMD_INQUIRY);
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/* if the page is owned, de-allocate it */
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if ((temp_reg & SMCSJR_PO) == PAGE_OWNED) {
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temp_reg = secmem_set_cmd(PAGE(page_num) | CMD_PAGE_DEALLOC);
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if (temp_reg & SMCSJR_AERR) {
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printf("Error: Allocation status 0x%X\n", temp_reg);
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return ERROR_IN_PAGE_ALLOC;
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}
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}
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/* Allocate page_num to partition_num */
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temp_reg = secmem_set_cmd(PAGE(page_num) | PARTITION(partition_num)
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| CMD_PAGE_ALLOC);
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if (temp_reg & SMCSJR_AERR) {
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printf("Error: Allocation status 0x%X\n", temp_reg);
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return ERROR_IN_PAGE_ALLOC;
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}
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/* page inquiry command to ensure that the page was allocated */
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temp_reg = secmem_set_cmd(PAGE(page_num) | CMD_INQUIRY);
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/* if the page is not owned => problem */
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if ((temp_reg & SMCSJR_PO) != PAGE_OWNED) {
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printf("Allocation of page %d in partition %d failed 0x%X\n",
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temp_reg, page_num, partition_num);
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return ERROR_IN_PAGE_ALLOC;
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}
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return 0;
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}
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int inline_cnstr_jobdesc_blob_dek(uint32_t *desc, const uint8_t *plain_txt,
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uint8_t *dek_blob, uint32_t in_sz)
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{
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ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
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uint32_t sm_vid = SM_VERSION(sec_in32(&sec->smvid));
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uint32_t jr_id = 0;
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uint32_t ret = 0;
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u32 aad_w1, aad_w2;
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/* output blob will have 32 bytes key blob in beginning and
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* 16 byte HMAC identifier at end of data blob */
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uint32_t out_sz = in_sz + KEY_BLOB_SIZE + MAC_SIZE;
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/* Setting HDR for blob */
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uint8_t wrapped_key_hdr[8] = {HDR_TAG, 0x00, WRP_HDR_SIZE + out_sz,
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HDR_PAR, HAB_MOD, HAB_ALG, in_sz, HAB_FLG};
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/* initialize the blob array */
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memset(dek_blob, 0, out_sz + 8);
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/* Copy the header into the DEK blob buffer */
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memcpy(dek_blob, wrapped_key_hdr, sizeof(wrapped_key_hdr));
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/* allocating secure memory */
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ret = caam_page_alloc(PAGE_1, PARTITION_1);
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if (ret)
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return ret;
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/* Write DEK to secure memory */
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memcpy((uint32_t *)SEC_MEM_PAGE1, (uint32_t *)plain_txt, in_sz);
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unsigned long start = (unsigned long)SEC_MEM_PAGE1 &
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~(ARCH_DMA_MINALIGN - 1);
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unsigned long end = ALIGN(start + 0x1000, ARCH_DMA_MINALIGN);
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flush_dcache_range(start, end);
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/* Now configure the access rights of the partition */
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sec_out32(CAAM_SMAG1JR(sm_vid, jr_id, PARTITION_1), KS_G1);
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sec_out32(CAAM_SMAG2JR(sm_vid, jr_id, PARTITION_1), 0);
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sec_out32(CAAM_SMAPJR(sm_vid, jr_id, PARTITION_1), PERM);
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/* construct aad for AES */
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aad_w1 = (in_sz << OP_ALG_ALGSEL_SHIFT) | KEY_AES_SRC | LD_CCM_MODE;
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aad_w2 = 0x0;
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init_job_desc(desc, 0);
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append_cmd(desc, CMD_LOAD | CLASS_2 | KEY_IMM | KEY_ENC |
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(0x0c << LDST_OFFSET_SHIFT) | 0x08);
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append_u32(desc, aad_w1);
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append_u32(desc, aad_w2);
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append_cmd_ptr(desc, (dma_addr_t)SEC_MEM_PAGE1, in_sz, CMD_SEQ_IN_PTR);
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append_cmd_ptr(desc, (dma_addr_t)dek_blob + 8, out_sz, CMD_SEQ_OUT_PTR);
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append_operation(desc, OP_TYPE_ENCAP_PROTOCOL | OP_PCLID_BLOB |
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OP_PCLID_SECMEM);
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return ret;
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}
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#endif
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void inline_cnstr_jobdesc_hash(uint32_t *desc,
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const uint8_t *msg, uint32_t msgsz, uint8_t *digest,
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u32 alg_type, uint32_t alg_size, int sg_tbl)
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{
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/* SHA 256 , output is of length 32 words */
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uint32_t storelen = alg_size;
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u32 options;
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dma_addr_t dma_addr_in, dma_addr_out;
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dma_addr_in = virt_to_phys((void *)msg);
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dma_addr_out = virt_to_phys((void *)digest);
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init_job_desc(desc, 0);
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append_operation(desc, OP_TYPE_CLASS2_ALG |
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OP_ALG_AAI_HASH | OP_ALG_AS_INITFINAL |
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OP_ALG_ENCRYPT | OP_ALG_ICV_OFF | alg_type);
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options = LDST_CLASS_2_CCB | FIFOLD_TYPE_MSG | FIFOLD_TYPE_LAST2;
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if (sg_tbl)
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options |= FIFOLDST_SGF;
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if (msgsz > 0xffff) {
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options |= FIFOLDST_EXT;
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append_fifo_load(desc, dma_addr_in, 0, options);
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append_cmd(desc, msgsz);
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} else {
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append_fifo_load(desc, dma_addr_in, msgsz, options);
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}
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append_store(desc, dma_addr_out, storelen,
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LDST_CLASS_2_CCB | LDST_SRCDST_BYTE_CONTEXT);
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}
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#ifndef CONFIG_SPL_BUILD
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void inline_cnstr_jobdesc_blob_encap(uint32_t *desc, uint8_t *key_idnfr,
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uint8_t *plain_txt, uint8_t *enc_blob,
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uint32_t in_sz)
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{
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dma_addr_t dma_addr_key_idnfr, dma_addr_in, dma_addr_out;
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uint32_t key_sz = KEY_IDNFR_SZ_BYTES;
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/* output blob will have 32 bytes key blob in beginning and
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* 16 byte HMAC identifier at end of data blob */
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uint32_t out_sz = in_sz + KEY_BLOB_SIZE + MAC_SIZE;
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dma_addr_key_idnfr = virt_to_phys((void *)key_idnfr);
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dma_addr_in = virt_to_phys((void *)plain_txt);
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dma_addr_out = virt_to_phys((void *)enc_blob);
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init_job_desc(desc, 0);
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append_key(desc, dma_addr_key_idnfr, key_sz, CLASS_2);
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append_seq_in_ptr(desc, dma_addr_in, in_sz, 0);
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append_seq_out_ptr(desc, dma_addr_out, out_sz, 0);
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append_operation(desc, OP_TYPE_ENCAP_PROTOCOL | OP_PCLID_BLOB);
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}
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void inline_cnstr_jobdesc_blob_decap(uint32_t *desc, uint8_t *key_idnfr,
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uint8_t *enc_blob, uint8_t *plain_txt,
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uint32_t out_sz)
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{
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dma_addr_t dma_addr_key_idnfr, dma_addr_in, dma_addr_out;
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uint32_t key_sz = KEY_IDNFR_SZ_BYTES;
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uint32_t in_sz = out_sz + KEY_BLOB_SIZE + MAC_SIZE;
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dma_addr_key_idnfr = virt_to_phys((void *)key_idnfr);
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dma_addr_in = virt_to_phys((void *)enc_blob);
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dma_addr_out = virt_to_phys((void *)plain_txt);
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init_job_desc(desc, 0);
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append_key(desc, dma_addr_key_idnfr, key_sz, CLASS_2);
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append_seq_in_ptr(desc, dma_addr_in, in_sz, 0);
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append_seq_out_ptr(desc, dma_addr_out, out_sz, 0);
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append_operation(desc, OP_TYPE_DECAP_PROTOCOL | OP_PCLID_BLOB);
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}
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#endif
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/*
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* Descriptor to instantiate RNG State Handle 0 in normal mode and
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* load the JDKEK, TDKEK and TDSK registers
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*/
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void inline_cnstr_jobdesc_rng_instantiation(uint32_t *desc)
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{
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u32 *jump_cmd;
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init_job_desc(desc, 0);
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/* INIT RNG in non-test mode */
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append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
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OP_ALG_AS_INIT);
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/* wait for done */
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jump_cmd = append_jump(desc, JUMP_CLASS_CLASS1);
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set_jump_tgt_here(desc, jump_cmd);
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/*
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* load 1 to clear written reg:
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* resets the done interrrupt and returns the RNG to idle.
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*/
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append_load_imm_u32(desc, 1, LDST_SRCDST_WORD_CLRW);
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/* generate secure keys (non-test) */
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append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
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OP_ALG_RNG4_SK);
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}
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/* Change key size to bytes form bits in calling function*/
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void inline_cnstr_jobdesc_pkha_rsaexp(uint32_t *desc,
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struct pk_in_params *pkin, uint8_t *out,
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uint32_t out_siz)
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{
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dma_addr_t dma_addr_e, dma_addr_a, dma_addr_n, dma_addr_out;
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dma_addr_e = virt_to_phys((void *)pkin->e);
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dma_addr_a = virt_to_phys((void *)pkin->a);
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dma_addr_n = virt_to_phys((void *)pkin->n);
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dma_addr_out = virt_to_phys((void *)out);
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init_job_desc(desc, 0);
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append_key(desc, dma_addr_e, pkin->e_siz, KEY_DEST_PKHA_E | CLASS_1);
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append_fifo_load(desc, dma_addr_a,
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pkin->a_siz, LDST_CLASS_1_CCB | FIFOLD_TYPE_PK_A);
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append_fifo_load(desc, dma_addr_n,
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pkin->n_siz, LDST_CLASS_1_CCB | FIFOLD_TYPE_PK_N);
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append_operation(desc, OP_TYPE_PK | OP_ALG_PK | OP_ALG_PKMODE_MOD_EXPO);
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append_fifo_store(desc, dma_addr_out, out_siz,
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LDST_CLASS_1_CCB | FIFOST_TYPE_PKHA_B);
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}
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