u-boot/arch/mips/include
Stefan Roese a02bc1f992 mips: traps: Set WG bit in EBase register on Octeon
WG (bit 11) needs to be set on Octeon to enable writing bits 63:30 of
the exception base register.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-07-18 14:23:25 +02:00
..
asm mips: traps: Set WG bit in EBase register on Octeon 2020-07-18 14:23:25 +02:00