mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 10:48:51 +00:00
9f3183d2d6
There are two LS series processors are built on ARMv8 Layersacpe architecture currently, LS2085A and LS1043A. They are based on ARMv8 core although use different chassis, so create fsl-layerscape to refactor the common code for the LS series processors which also paves the way for adding LS1043A platform. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
66 lines
1,017 B
C
66 lines
1,017 B
C
/*
|
|
* Copyright 2015 Freescale Semiconductor, Inc.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#ifndef __FSL_SERDES_H__
|
|
#define __FSL_SERDES_H__
|
|
|
|
#include <config.h>
|
|
|
|
#if defined(CONFIG_LS2085A)
|
|
enum srds_prtcl {
|
|
NONE = 0,
|
|
PCIE1,
|
|
PCIE2,
|
|
PCIE3,
|
|
PCIE4,
|
|
SATA1,
|
|
SATA2,
|
|
XAUI1,
|
|
XAUI2,
|
|
XFI1,
|
|
XFI2,
|
|
XFI3,
|
|
XFI4,
|
|
XFI5,
|
|
XFI6,
|
|
XFI7,
|
|
XFI8,
|
|
SGMII1,
|
|
SGMII2,
|
|
SGMII3,
|
|
SGMII4,
|
|
SGMII5,
|
|
SGMII6,
|
|
SGMII7,
|
|
SGMII8,
|
|
SGMII9,
|
|
SGMII10,
|
|
SGMII11,
|
|
SGMII12,
|
|
SGMII13,
|
|
SGMII14,
|
|
SGMII15,
|
|
SGMII16,
|
|
QSGMII_A, /* A indicates MACs 1-4 */
|
|
QSGMII_B, /* B indicates MACs 5-8 */
|
|
QSGMII_C, /* C indicates MACs 9-12 */
|
|
QSGMII_D, /* D indicates MACs 12-16 */
|
|
SERDES_PRCTL_COUNT
|
|
};
|
|
|
|
enum srds {
|
|
FSL_SRDS_1 = 0,
|
|
FSL_SRDS_2 = 1,
|
|
};
|
|
#endif
|
|
|
|
int is_serdes_configured(enum srds_prtcl device);
|
|
void fsl_serdes_init(void);
|
|
int serdes_get_first_lane(u32 sd, enum srds_prtcl device);
|
|
enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane);
|
|
int is_serdes_prtcl_valid(int serdes, u32 prtcl);
|
|
|
|
#endif /* __FSL_SERDES_H__ */
|