mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-25 04:23:46 +00:00
17deab0edd
Use uintptr_t instead of phys_addr_t where appropriate, so passing the addresses to writel() doesn't result in compile warnings when PHYS_64BIT is set for 32bit builds (which is actually a useful configuration, as the K3 SoC family boots from an R5 SPL, which may pass bank information based on gd->bd->bi_dram to fdt_fixup_memory_banks() etc., so PHYS_64BIT is needed for fixing up the upper bank). Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
47 lines
1.3 KiB
C
47 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* K3: Architecture common definitions
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*
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* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
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* Lokesh Vutla <lokeshvutla@ti.com>
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*/
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#include <asm/armv7_mpu.h>
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#include <asm/hardware.h>
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#define K3_FIREWALL_BACKGROUND_BIT (8)
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struct fwl_data {
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const char *name;
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u16 fwl_id;
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u16 regions;
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};
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enum k3_firewall_region_type {
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K3_FIREWALL_REGION_FOREGROUND,
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K3_FIREWALL_REGION_BACKGROUND
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};
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enum k3_device_type {
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K3_DEVICE_TYPE_BAD,
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K3_DEVICE_TYPE_GP,
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K3_DEVICE_TYPE_TEST,
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K3_DEVICE_TYPE_EMU,
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K3_DEVICE_TYPE_HS_FS,
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K3_DEVICE_TYPE_HS_SE,
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};
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void setup_k3_mpu_regions(void);
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int early_console_init(void);
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void disable_linefill_optimization(void);
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void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size);
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int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr);
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void k3_sysfw_print_ver(void);
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void spl_enable_dcache(void);
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void mmr_unlock(uintptr_t base, u32 partition);
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bool is_rom_loaded_sysfw(struct rom_extended_boot_data *data);
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enum k3_device_type get_device_type(void);
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void ti_secure_image_post_process(void **p_image, size_t *p_size);
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struct ti_sci_handle *get_ti_sci_handle(void);
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void do_board_detect(void);
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void ti_secure_image_check_binary(void **p_image, size_t *p_size);
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