mirror of
https://github.com/AsahiLinux/u-boot
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74273f1d9c
Sync the device tree for RK3588 series with Linux 6.6-rc1. Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
93 lines
1.5 KiB
Text
93 lines
1.5 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
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*/
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/dts-v1/;
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#include "rk3588j.dtsi"
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#include "rk3588-edgeble-neu6b.dtsi"
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/ {
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model = "Edgeble Neu6B IO Board";
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compatible = "edgeble,neural-compute-module-6b-io",
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"edgeble,neural-compute-module-6b", "rockchip,rk3588";
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aliases {
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serial2 = &uart2;
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};
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chosen {
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stdout-path = "serial2:1500000n8";
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};
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};
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&combphy0_ps {
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status = "okay";
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};
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&i2c6 {
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status = "okay";
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hym8563: rtc@51 {
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compatible = "haoyu,hym8563";
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reg = <0x51>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
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#clock-cells = <0>;
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clock-output-names = "hym8563";
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pinctrl-names = "default";
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pinctrl-0 = <&hym8563_int>;
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wakeup-source;
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};
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};
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&pinctrl {
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hym8563 {
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hym8563_int: hym8563-int {
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rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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/* FAN */
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&pwm2 {
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pinctrl-0 = <&pwm2m1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&sata0 {
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status = "okay";
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};
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&sdmmc {
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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disable-wp;
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no-sdio;
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no-mmc;
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sd-uhs-sdr104;
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vmmc-supply = <&vcc_3v3_s3>;
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vqmmc-supply = <&vccio_sd_s0>;
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status = "okay";
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};
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&uart2 {
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pinctrl-0 = <&uart2m0_xfer>;
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status = "okay";
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};
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/* RS232 */
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&uart6 {
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pinctrl-0 = <&uart6m0_xfer>;
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pinctrl-names = "default";
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status = "okay";
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};
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/* RS485 */
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&uart7 {
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pinctrl-0 = <&uart7m2_xfer>;
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pinctrl-names = "default";
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status = "okay";
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};
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