mirror of
https://github.com/AsahiLinux/u-boot
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0fd3d91152
Most drivers use these access methods but a few do not. Update them. In some cases the access is not permitted, so mark those with a FIXME tag for the maintainer to check. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Pratyush Yadav <p.yadav@ti.com>
61 lines
1.6 KiB
C
61 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2015 Google, Inc
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*/
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#include <common.h>
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#include <debug_uart.h>
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#include <dm.h>
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#include <dt-structs.h>
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#include <ns16550.h>
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#include <serial.h>
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#include <asm/arch-rockchip/clock.h>
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#include <dm/device-internal.h>
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#if defined(CONFIG_ROCKCHIP_RK3188)
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struct rockchip_uart_plat {
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struct dtd_rockchip_rk3188_uart dtplat;
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struct ns16550_plat plat;
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};
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struct dtd_rockchip_rk3188_uart *dtplat, s_dtplat;
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#elif defined(CONFIG_ROCKCHIP_RK3288)
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struct rockchip_uart_plat {
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struct dtd_rockchip_rk3288_uart dtplat;
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struct ns16550_plat plat;
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};
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struct dtd_rockchip_rk3288_uart *dtplat, s_dtplat;
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#endif
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static int rockchip_serial_probe(struct udevice *dev)
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{
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struct rockchip_uart_plat *plat = dev_get_plat(dev);
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/* Create some new platform data for the standard driver */
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plat->plat.base = plat->dtplat.reg[0];
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plat->plat.reg_shift = plat->dtplat.reg_shift;
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plat->plat.clock = plat->dtplat.clock_frequency;
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plat->plat.fcr = UART_FCR_DEFVAL;
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dev_set_plat(dev, &plat->plat);
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return ns16550_serial_probe(dev);
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}
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U_BOOT_DRIVER(rockchip_rk3188_uart) = {
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.name = "rockchip_rk3188_uart",
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.id = UCLASS_SERIAL,
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.priv_auto = sizeof(struct ns16550),
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.plat_auto = sizeof(struct rockchip_uart_plat),
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.probe = rockchip_serial_probe,
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.ops = &ns16550_serial_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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U_BOOT_DRIVER(rockchip_rk3288_uart) = {
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.name = "rockchip_rk3288_uart",
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.id = UCLASS_SERIAL,
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.priv_auto = sizeof(struct ns16550),
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.plat_auto = sizeof(struct rockchip_uart_plat),
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.probe = rockchip_serial_probe,
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.ops = &ns16550_serial_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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