mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-16 17:58:23 +00:00
bf1ddfc026
The DTS files had some spacing issues and they needed fixing. This
pull re-sync's the OMAP3xx related DTS files with Linux 4.13-RC5.
To keep the DTS and DTSI files clean and in sync with Linux, new
u-boot.dtsi files are added.
Signed-off-by: Adam Ford <aford173@gmail.com>
V3: The resync broke card detect on MMC1 on Logic PD's Torpedo,
so we add the cd-invert to the Torpedo's -u-boot.dtsi file.
V2: Add the u-boot.dtsi files for OMAP3, OMAP36xx, and Torpedo
Remove the need for the second patch in the series
124 lines
2.7 KiB
Text
124 lines
2.7 KiB
Text
/*
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* Device Tree Source for OMAP3 SoC
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*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <dt-bindings/media/omap3-isp.h>
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#include "omap3.dtsi"
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/ {
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aliases {
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serial3 = &uart4;
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};
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cpus {
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/* OMAP3630/OMAP37xx 'standard device' variants OPP50 to OPP130 */
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cpu: cpu@0 {
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operating-points = <
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/* kHz uV */
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300000 1012500
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600000 1200000
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800000 1325000
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>;
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clock-latency = <300000>; /* From legacy driver */
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};
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};
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ocp@68000000 {
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uart4: serial@49042000 {
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compatible = "ti,omap3-uart";
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reg = <0x49042000 0x400>;
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reg-shift = <2>;
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interrupts = <80>;
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dmas = <&sdma 81 &sdma 82>;
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dma-names = "tx", "rx";
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ti,hwmods = "uart4";
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clock-frequency = <48000000>;
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};
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abb_mpu_iva: regulator-abb-mpu {
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compatible = "ti,abb-v1";
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regulator-name = "abb_mpu_iva";
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#address-cells = <0>;
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#size-cells = <0>;
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reg = <0x483072f0 0x8>, <0x48306818 0x4>;
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reg-names = "base-address", "int-address";
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ti,tranxdone-status-mask = <0x4000000>;
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clocks = <&sys_ck>;
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ti,settling-time = <30>;
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ti,clock-cycles = <8>;
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ti,abb_info = <
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/*uV ABB efuse rbb_m fbb_m vset_m*/
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1012500 0 0 0 0 0
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1200000 0 0 0 0 0
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1325000 0 0 0 0 0
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1375000 1 0 0 0 0
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>;
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};
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omap3_pmx_core2: pinmux@480025a0 {
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compatible = "ti,omap3-padconf", "pinctrl-single";
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reg = <0x480025a0 0x5c>;
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#address-cells = <1>;
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#size-cells = <0>;
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#pinctrl-cells = <1>;
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#interrupt-cells = <1>;
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interrupt-controller;
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pinctrl-single,register-width = <16>;
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pinctrl-single,function-mask = <0xff1f>;
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};
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isp: isp@480bc000 {
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compatible = "ti,omap3-isp";
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reg = <0x480bc000 0x12fc
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0x480bd800 0x0600>;
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interrupts = <24>;
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iommus = <&mmu_isp>;
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syscon = <&scm_conf 0x2f0>;
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ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
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#clock-cells = <1>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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bandgap: bandgap@48002524 {
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reg = <0x48002524 0x4>;
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compatible = "ti,omap36xx-bandgap";
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#thermal-sensor-cells = <0>;
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};
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};
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thermal_zones: thermal-zones {
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#include "omap3-cpu-thermal.dtsi"
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};
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};
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/* OMAP3630 needs dss_96m_fck for VENC */
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&venc {
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clocks = <&dss_tv_fck>, <&dss_96m_fck>;
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clock-names = "fck", "tv_dac_clk";
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};
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&ssi {
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status = "ok";
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clocks = <&ssi_ssr_fck>,
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<&ssi_sst_fck>,
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<&ssi_ick>;
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clock-names = "ssi_ssr_fck",
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"ssi_sst_fck",
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"ssi_ick";
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};
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/include/ "omap34xx-omap36xx-clocks.dtsi"
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/include/ "omap36xx-omap3430es2plus-clocks.dtsi"
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/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
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/include/ "omap36xx-clocks.dtsi"
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