mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-07 21:54:45 +00:00
cd71b1d5d2
Add initial support for the Ingenic JZ47xx MIPS SoC. Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Marek Vasut <marex@denx.de>
39 lines
1 KiB
C
39 lines
1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
|
|
#include <config.h>
|
|
#include <common.h>
|
|
#include <asm/io.h>
|
|
#include <mach/jz4780.h>
|
|
|
|
int jz47xx_gpio_get_value(unsigned int gpio)
|
|
{
|
|
void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
|
|
int port = gpio / 32;
|
|
int pin = gpio % 32;
|
|
|
|
return readl(gpio_regs + GPIO_PXPIN(port)) & BIT(pin);
|
|
}
|
|
|
|
void jz47xx_gpio_direction_input(unsigned int gpio)
|
|
{
|
|
void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
|
|
int port = gpio / 32;
|
|
int pin = gpio % 32;
|
|
|
|
writel(BIT(pin), gpio_regs + GPIO_PXINTC(port));
|
|
writel(BIT(pin), gpio_regs + GPIO_PXMASKS(port));
|
|
writel(BIT(pin), gpio_regs + GPIO_PXPAT1S(port));
|
|
}
|
|
|
|
void jz47xx_gpio_direction_output(unsigned int gpio, int value)
|
|
{
|
|
void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
|
|
int port = gpio / 32;
|
|
int pin = gpio % 32;
|
|
|
|
writel(BIT(pin), gpio_regs + GPIO_PXINTC(port));
|
|
writel(BIT(pin), gpio_regs + GPIO_PXMASKS(port));
|
|
writel(BIT(pin), gpio_regs + GPIO_PXPAT1C(port));
|
|
writel(BIT(pin), gpio_regs +
|
|
(value ? GPIO_PXPAT0S(port) : GPIO_PXPAT0C(port)));
|
|
}
|