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2c2cc3e9c0
The pinctrl and GPIO drivers are currently heavily incompatible with upstream. Most Qualcomm pinctrl blocks feature "tiles" of pins, each at it's own address. Introduce support for these by allowing the soc driver to specify per-pin register offsets similarly to the Linux driver. Adjust the GPIO driver to handle these too, and finally enable support for all pins with the same numbering as used in Linux. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
83 lines
1.8 KiB
C
83 lines
1.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Qualcomm QCS404 pinctrl
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*
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* (C) Copyright 2022 Sumit Garg <sumit.garg@linaro.org>
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*/
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#include <common.h>
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#include <dm.h>
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#include "pinctrl-qcom.h"
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#define MAX_PIN_NAME_LEN 32
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static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
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static const char * const msm_pinctrl_pins[] = {
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"SDC1_RCLK",
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"SDC1_CLK",
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"SDC1_CMD",
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"SDC1_DATA",
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"SDC2_CLK",
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"SDC2_CMD",
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"SDC2_DATA",
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};
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static const struct pinctrl_function msm_pinctrl_functions[] = {
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{"blsp_uart2", 1},
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{"rgmii_int", 1},
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{"rgmii_ck", 1},
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{"rgmii_tx", 1},
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{"rgmii_ctl", 1},
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{"rgmii_rx", 1},
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{"rgmii_mdio", 1},
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{"rgmii_mdc", 1},
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{"blsp_i2c0", 3},
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{"blsp_i2c1", 2},
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{"blsp_i2c_sda_a2", 3},
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{"blsp_i2c_scl_a2", 3},
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{"blsp_i2c3", 2},
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{"blsp_i2c4", 1},
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};
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static const char *qcs404_get_function_name(struct udevice *dev,
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unsigned int selector)
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{
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return msm_pinctrl_functions[selector].name;
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}
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static const char *qcs404_get_pin_name(struct udevice *dev,
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unsigned int selector)
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{
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if (selector < 120) {
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snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector);
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return pin_name;
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} else {
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return msm_pinctrl_pins[selector - 120];
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}
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}
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static unsigned int qcs404_get_function_mux(unsigned int selector)
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{
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return msm_pinctrl_functions[selector].val;
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}
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static struct msm_pinctrl_data qcs404_data = {
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.pin_data = { .pin_count = 126, },
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.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
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.get_function_name = qcs404_get_function_name,
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.get_function_mux = qcs404_get_function_mux,
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.get_pin_name = qcs404_get_pin_name,
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};
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static const struct udevice_id msm_pinctrl_ids[] = {
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{ .compatible = "qcom,qcs404-pinctrl", .data = (ulong)&qcs404_data },
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{ /* Sentinal */ }
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};
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U_BOOT_DRIVER(pinctrl_qcs404) = {
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.name = "pinctrl_qcs404",
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.id = UCLASS_NOP,
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.of_match = msm_pinctrl_ids,
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.ops = &msm_pinctrl_ops,
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.bind = msm_pinctrl_bind,
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};
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