mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-05 12:45:42 +00:00
dc18413adb
This patch adds a quirk to disable USB 2.0 MAC linestate check
during HS transmit. Refer the dwc3 databook, we can use it for
some special platforms if the linestate not reflect the expected
line state(J) during transmission.
When use this quirk, the controller implements a fixed 40-bit
TxEndDelay after the packet is given on UTMI and ignores the
linestate during the transmit of a token (during token-to-token
and token-to-data IPGAP).
On some rockchip platforms (e.g. rk3399), it requires to disable
the u2mac linestate check to decrease the SSPLIT token to SETUP
token inter-packet delay from 566ns to 466ns, and fix the issue
that FS/LS devices not recognized if inserted through USB 3.0 HUB.
Reference from below Linux commit,
commit <65db7a0c9816> ("usb: dwc3: add disable u2mac linestate
check quirk")
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
65 lines
1.6 KiB
C
65 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/* include/dwc3-uboot.h
|
|
*
|
|
* Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
|
|
*
|
|
* Designware SuperSpeed USB uboot init
|
|
*/
|
|
|
|
#ifndef __DWC3_UBOOT_H_
|
|
#define __DWC3_UBOOT_H_
|
|
|
|
#include <generic-phy.h>
|
|
#include <linux/usb/otg.h>
|
|
#include <linux/usb/phy.h>
|
|
|
|
struct dwc3_device {
|
|
unsigned long base;
|
|
enum usb_dr_mode dr_mode;
|
|
enum usb_phy_interface hsphy_mode;
|
|
u32 maximum_speed;
|
|
unsigned tx_fifo_resize:1;
|
|
unsigned has_lpm_erratum;
|
|
u8 lpm_nyet_threshold;
|
|
unsigned is_utmi_l1_suspend;
|
|
u8 hird_threshold;
|
|
unsigned disable_scramble_quirk;
|
|
unsigned u2exit_lfps_quirk;
|
|
unsigned u2ss_inp3_quirk;
|
|
unsigned req_p1p2p3_quirk;
|
|
unsigned del_p1p2p3_quirk;
|
|
unsigned del_phy_power_chg_quirk;
|
|
unsigned lfps_filter_quirk;
|
|
unsigned rx_detect_poll_quirk;
|
|
unsigned dis_u3_susphy_quirk;
|
|
unsigned dis_u2_susphy_quirk;
|
|
unsigned dis_del_phy_power_chg_quirk;
|
|
unsigned dis_tx_ipgap_linecheck_quirk;
|
|
unsigned dis_enblslpm_quirk;
|
|
unsigned dis_u2_freeclk_exists_quirk;
|
|
unsigned tx_de_emphasis_quirk;
|
|
unsigned tx_de_emphasis;
|
|
int index;
|
|
};
|
|
|
|
int dwc3_uboot_init(struct dwc3_device *dev);
|
|
void dwc3_uboot_exit(int index);
|
|
void dwc3_uboot_handle_interrupt(int index);
|
|
|
|
struct phy;
|
|
#if CONFIG_IS_ENABLED(PHY) && CONFIG_IS_ENABLED(DM_USB)
|
|
int dwc3_setup_phy(struct udevice *dev, struct phy_bulk *phys);
|
|
int dwc3_shutdown_phy(struct udevice *dev, struct phy_bulk *phys);
|
|
#else
|
|
static inline int dwc3_setup_phy(struct udevice *dev, struct phy_bulk *phys)
|
|
{
|
|
return -ENOTSUPP;
|
|
}
|
|
|
|
static inline int dwc3_shutdown_phy(struct udevice *dev, struct phy_bulk *phys)
|
|
{
|
|
return -ENOTSUPP;
|
|
}
|
|
#endif
|
|
|
|
#endif /* __DWC3_UBOOT_H_ */
|