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https://github.com/AsahiLinux/u-boot
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0fd3d91152
Most drivers use these access methods but a few do not. Update them. In some cases the access is not permitted, so mark those with a FIXME tag for the maintainer to check. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Pratyush Yadav <p.yadav@ti.com>
143 lines
3.4 KiB
C
143 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* MMIO register bitfield-controlled multiplexer driver
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* Based on the linux mmio multiplexer driver
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*
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* Copyright (C) 2017 Pengutronix, Philipp Zabel <kernel@pengutronix.de>
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* Copyright (C) 2019 Texas Instrument, Jean-jacques Hiblot <jjhiblot@ti.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <mux-internal.h>
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#include <regmap.h>
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#include <syscon.h>
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#include <dm/device.h>
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#include <dm/device-internal.h>
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#include <dm/device_compat.h>
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#include <dm/read.h>
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#include <dm/devres.h>
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#include <dt-bindings/mux/mux.h>
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#include <linux/bitops.h>
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static int mux_mmio_set(struct mux_control *mux, int state)
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{
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struct regmap_field **fields = dev_get_priv(mux->dev);
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return regmap_field_write(fields[mux_control_get_index(mux)], state);
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}
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static const struct mux_control_ops mux_mmio_ops = {
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.set = mux_mmio_set,
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};
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static const struct udevice_id mmio_mux_of_match[] = {
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{ .compatible = "mmio-mux" },
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{ /* sentinel */ },
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};
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static int mmio_mux_probe(struct udevice *dev)
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{
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struct regmap_field **fields;
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struct mux_chip *mux_chip = dev_get_uclass_priv(dev);
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struct regmap *regmap;
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u32 *mux_reg_masks;
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u32 *idle_states;
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int num_fields;
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int ret;
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int i;
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regmap = syscon_node_to_regmap(dev_ofnode(dev->parent));
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if (IS_ERR(regmap)) {
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ret = PTR_ERR(regmap);
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dev_err(dev, "failed to get regmap: %d\n", ret);
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return ret;
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}
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num_fields = dev_read_size(dev, "mux-reg-masks");
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if (num_fields < 0)
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return log_msg_ret("mux-reg-masks missing", -EINVAL);
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num_fields /= sizeof(u32);
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if (num_fields == 0 || num_fields % 2)
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ret = -EINVAL;
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num_fields = num_fields / 2;
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ret = mux_alloc_controllers(dev, num_fields);
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if (ret < 0)
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return log_msg_ret("mux_alloc_controllers", ret);
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fields = devm_kmalloc(dev, num_fields * sizeof(*fields), __GFP_ZERO);
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if (!fields)
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return -ENOMEM;
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dev_set_priv(dev, fields);
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mux_reg_masks = devm_kmalloc(dev, num_fields * 2 * sizeof(u32),
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__GFP_ZERO);
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if (!mux_reg_masks)
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return -ENOMEM;
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ret = dev_read_u32_array(dev, "mux-reg-masks", mux_reg_masks,
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num_fields * 2);
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if (ret < 0)
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return log_msg_ret("mux-reg-masks read", ret);
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idle_states = devm_kmalloc(dev, num_fields * sizeof(u32), __GFP_ZERO);
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if (!idle_states)
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return -ENOMEM;
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ret = dev_read_u32_array(dev, "idle-states", idle_states, num_fields);
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if (ret < 0) {
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log_err("idle-states");
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devm_kfree(dev, idle_states);
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idle_states = NULL;
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}
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for (i = 0; i < num_fields; i++) {
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struct mux_control *mux = &mux_chip->mux[i];
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struct reg_field field;
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u32 reg, mask;
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int bits;
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reg = mux_reg_masks[2 * i];
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mask = mux_reg_masks[2 * i + 1];
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field.reg = reg;
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field.msb = fls(mask) - 1;
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field.lsb = ffs(mask) - 1;
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if (mask != GENMASK(field.msb, field.lsb))
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return log_msg_ret("invalid mask", -EINVAL);
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fields[i] = devm_regmap_field_alloc(dev, regmap, field);
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if (IS_ERR(fields[i])) {
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ret = PTR_ERR(fields[i]);
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return log_msg_ret("regmap_field_alloc", ret);
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}
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bits = 1 + field.msb - field.lsb;
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mux->states = 1 << bits;
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if (!idle_states)
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continue;
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if (idle_states[i] != MUX_IDLE_AS_IS &&
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idle_states[i] >= mux->states)
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return log_msg_ret("idle-states range", -EINVAL);
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mux->idle_state = idle_states[i];
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}
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devm_kfree(dev, mux_reg_masks);
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if (idle_states)
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devm_kfree(dev, idle_states);
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return 0;
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}
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U_BOOT_DRIVER(mmio_mux) = {
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.name = "mmio-mux",
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.id = UCLASS_MUX,
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.of_match = mmio_mux_of_match,
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.probe = mmio_mux_probe,
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.ops = &mux_mmio_ops,
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};
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