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ba94a1bba3
- Add IXP4xx NPE ethernet MAC support - Add support for Intel IXDPG425 board - Add support for Prodrive PDNB3 board - Add IRQ support Patch by Stefan Roese, 23 May 2006 [This patch does not include cpu/ixp/npe/IxNpeMicrocode.c which still sufferes from licensing issues. Blame Intel.]
90 lines
2.4 KiB
C
90 lines
2.4 KiB
C
/*
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* (C) Copyright 2005
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef NPE_H
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#define NPE_H
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/*
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* defines...
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*/
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#define CFG_NPE_NUMS 1
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#ifdef CONFIG_HAS_ETH1
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#undef CFG_NPE_NUMS
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#define CFG_NPE_NUMS 2
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#endif
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#define NPE_NUM_PORTS 3
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#define ACTIVE_PORTS 1
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#define NPE_PKT_SIZE 1600
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#define CONFIG_DEVS_ETH_INTEL_NPE_MAX_RX_DESCRIPTORS 64
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#define CONFIG_DEVS_ETH_INTEL_NPE_MAX_TX_DESCRIPTORS 2
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#define NPE_MBUF_POOL_SIZE \
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((CONFIG_DEVS_ETH_INTEL_NPE_MAX_TX_DESCRIPTORS + \
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CONFIG_DEVS_ETH_INTEL_NPE_MAX_RX_DESCRIPTORS) * \
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sizeof(IX_OSAL_MBUF) * ACTIVE_PORTS)
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#define NPE_PKT_POOL_SIZE \
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((CONFIG_DEVS_ETH_INTEL_NPE_MAX_TX_DESCRIPTORS + \
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CONFIG_DEVS_ETH_INTEL_NPE_MAX_RX_DESCRIPTORS) * \
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NPE_PKT_SIZE * ACTIVE_PORTS)
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#define NPE_MEM_POOL_SIZE (NPE_MBUF_POOL_SIZE + NPE_PKT_POOL_SIZE)
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#define PHY_AUTONEGOTIATE_TIMEOUT 4000 /* 4000 ms autonegotiate timeout */
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/*
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* structs...
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*/
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struct npe {
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u8 active; /* NPE active */
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u8 eth_id; /* IX_ETH_PORT_1 or IX_ETH_PORT_2 */
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u8 phy_no; /* which PHY (0 - 31) */
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u8 mac_address[6];
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IX_OSAL_MBUF *rxQHead;
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IX_OSAL_MBUF *txQHead;
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u8 *tx_pkts;
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u8 *rx_pkts;
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IX_OSAL_MBUF *rx_mbufs;
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IX_OSAL_MBUF *tx_mbufs;
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int print_speed;
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int rx_read;
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int rx_write;
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int rx_len[PKTBUFSRX];
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};
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/*
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* prototypes...
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*/
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extern int npe_miiphy_read (char *devname, unsigned char addr,
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unsigned char reg, unsigned short *value);
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extern int npe_miiphy_write (char *devname, unsigned char addr,
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unsigned char reg, unsigned short value);
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#endif /* ifndef NPE_H */
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