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https://github.com/AsahiLinux/u-boot
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1001502545
While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com>
46 lines
852 B
C
46 lines
852 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2014 Samsung Electronics
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* Minkyu Kang <mk7.kang@samsung.com>
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* Robert Baldyga <r.baldyga@samsung.com>
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*
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* based on arch/arm/cpu/armv7/omap3/cache.S
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*/
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#include <common.h>
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#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
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void enable_caches(void)
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{
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dcache_enable();
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}
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void disable_caches(void)
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{
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dcache_disable();
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}
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#endif
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#ifndef CONFIG_SYS_L2CACHE_OFF
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void v7_outer_cache_enable(void)
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{
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__asm(
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"push {r0, r1, r2, lr}\n\t"
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"mrc 15, 0, r3, cr1, cr0, 1\n\t"
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"orr r3, r3, #2\n\t"
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"mcr 15, 0, r3, cr1, cr0, 1\n\t"
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"pop {r1, r2, r3, pc}"
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);
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}
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void v7_outer_cache_disable(void)
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{
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__asm(
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"push {r0, r1, r2, lr}\n\t"
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"mrc 15, 0, r3, cr1, cr0, 1\n\t"
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"bic r3, r3, #2\n\t"
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"mcr 15, 0, r3, cr1, cr0, 1\n\t"
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"pop {r1, r2, r3, pc}"
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);
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}
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#endif
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