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https://github.com/AsahiLinux/u-boot
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65cc0e2a65
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
140 lines
4.2 KiB
C
140 lines
4.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Configuation settings for the Motorola MC5282EVB board.
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*
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* (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
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*/
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/*
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* board/config.h - configuration options, board specific
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*/
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#ifndef _CONFIG_M5282EVB_H
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#define _CONFIG_M5282EVB_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CFG_SYS_UART_PORT (0)
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#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
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/* Configuration for environment
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* Environment is embedded in u-boot in the second sector of the flash
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*/
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#define LDS_BOARD_TEXT \
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. = DEFINED(env_offset) ? env_offset : .; \
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env/embedded.o(.text*);
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#ifdef CONFIG_MCFFEC
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# define CONFIG_IPADDR 192.162.1.2
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# define CONFIG_NETMASK 255.255.255.0
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# define CONFIG_SERVERIP 192.162.1.1
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# define CONFIG_GATEWAYIP 192.162.1.1
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#endif /* CONFIG_MCFFEC */
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#define CONFIG_HOSTNAME "M5282EVB"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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"loadaddr=10000\0" \
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"u-boot=u-boot.bin\0" \
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"load=tftp ${loadaddr) ${u-boot}\0" \
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"upd=run load; run prog\0" \
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"prog=prot off ffe00000 ffe3ffff;" \
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"era ffe00000 ffe3ffff;" \
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"cp.b ${loadaddr} ffe00000 ${filesize};"\
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"save\0" \
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""
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#define CFG_SYS_CLK 64000000
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/* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */
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#define CFG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */
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#define CFG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */
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/*
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* Low Level Configuration Settings
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* (address mappings, register initial values, etc.)
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* You should know what you are doing if you make changes here.
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*/
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#define CFG_SYS_MBAR 0x40000000
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/*-----------------------------------------------------------------------
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* Definitions for initial stack pointer and data area (in DPRAM)
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*/
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#define CFG_SYS_INIT_RAM_ADDR 0x20000000
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#define CFG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
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/*-----------------------------------------------------------------------
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* Start addresses for the final memory configuration
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* (Set up by the startup code)
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* Please note that CFG_SYS_SDRAM_BASE _must_ start at 0
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*/
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#define CFG_SYS_SDRAM_BASE 0x00000000
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#define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
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#define CFG_SYS_FLASH_BASE CFG_SYS_CS0_BASE
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#define CFG_SYS_INT_FLASH_BASE 0xf0000000
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#define CFG_SYS_INT_FLASH_ENABLE 0x21
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization ??
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*/
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#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20))
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/*-----------------------------------------------------------------------
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* FLASH organization
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*/
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#ifdef CONFIG_SYS_FLASH_CFI
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# define CFG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */
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# define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE }
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#endif
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/*-----------------------------------------------------------------------
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* Cache Configuration
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*/
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#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
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CFG_SYS_INIT_RAM_SIZE - 8)
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#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
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CFG_SYS_INIT_RAM_SIZE - 4)
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#define CFG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM)
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#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \
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CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \
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CF_ACR_EN | CF_ACR_SM_ALL)
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#define CFG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \
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CF_CACR_CEIB | CF_CACR_DBWE | \
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CF_CACR_EUSP)
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/*-----------------------------------------------------------------------
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* Memory bank definitions
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*/
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#define CFG_SYS_CS0_BASE 0xFFE00000
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#define CFG_SYS_CS0_CTRL 0x00001980
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#define CFG_SYS_CS0_MASK 0x001F0001
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/*-----------------------------------------------------------------------
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* Port configuration
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*/
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#define CFG_SYS_PACNT 0x0000000 /* Port A D[31:24] */
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#define CFG_SYS_PADDR 0x0000000
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#define CFG_SYS_PADAT 0x0000000
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#define CFG_SYS_PBCNT 0x0000000 /* Port B D[23:16] */
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#define CFG_SYS_PBDDR 0x0000000
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#define CFG_SYS_PBDAT 0x0000000
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#define CFG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */
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#define CFG_SYS_PEHLPAR 0xC0
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#define CFG_SYS_PUAPAR 0x0F /* UA0..UA3 = Uart 0 +1 */
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#define CFG_SYS_DDRUA 0x05
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#define CFG_SYS_PJPAR 0xFF
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#endif /* _CONFIG_M5282EVB_H */
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