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https://github.com/AsahiLinux/u-boot
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871c24bc50
When adding support for the Arria10 platform, we're going to name the file base_addr_a10.h, so to be systematic about it, rename the socfpga_base_addr.h to be base_addr_ac5.h for the Arria5 and Cyclone5 platform. Suggested-by: Marek Vasut <marex@denx.de> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
137 lines
4.1 KiB
C
137 lines
4.1 KiB
C
/*
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* Copyright (C) 2015 Marek Vasut <marex@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_DENX_MCVEVK_H__
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#define __CONFIG_DENX_MCVEVK_H__
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#include <asm/arch/base_addr_ac5.h>
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/* U-Boot Commands */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_DOS_PARTITION
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#define CONFIG_FAT_WRITE
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#define CONFIG_HW_WATCHDOG
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_DFU
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_EXT4
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#define CONFIG_CMD_EXT4_WRITE
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_FS_GENERIC
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#define CONFIG_CMD_GREPENV
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_USB
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#define CONFIG_CMD_USB_MASS_STORAGE
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/* Memory configurations */
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#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on MCV */
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/* Booting Linux */
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTFILE "fitImage"
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#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
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#define CONFIG_PREBOOT "run try_bootscript"
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#define CONFIG_BOOTCOMMAND "run mmc_mmc"
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#define CONFIG_LOADADDR 0x01000000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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/* Environment is in MMC */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */
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#define CONFIG_ENV_OFFSET 512 /* just after the MBR */
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/* USB */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS
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#endif
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#define CONFIG_G_DNL_MANUFACTURER "DENX"
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/* Extra Environment */
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#define CONFIG_HOSTNAME mcvevk
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"consdev=ttyS0\0" \
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"baudrate=115200\0" \
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"bootscript=boot.scr\0" \
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"bootdev=/dev/mmcblk0p2\0" \
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"rootdev=/dev/mmcblk0p3\0" \
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"netdev=eth0\0" \
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"hostname=mcvevk\0" \
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"kernel_addr_r=0x10000000\0" \
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"update_filename=u-boot-with-spl-dtb.sfp\0" \
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"update_sd_offset=0x800\0" \
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"update_sd=" /* Update the SD firmware partition */ \
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"if mmc rescan ; then " \
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"if tftp ${update_filename} ; then " \
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"setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \
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"setexpr fw_sz ${fw_sz} + 1 ; " \
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"mmc write ${loadaddr} ${update_sd_offset} ${fw_sz} ; " \
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"fi ; " \
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"fi\0" \
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"update_qspi_offset=0x0\0" \
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"update_qspi=" /* Update the QSPI firmware */ \
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"if sf probe ; then " \
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"if tftp ${update_filename} ; then " \
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"sf update ${loadaddr} ${update_qspi_offset} ${filesize} ; " \
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"fi ; " \
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"fi\0" \
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"fpga_filename=output_file.rbf\0" \
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"load_fpga=" /* Load FPGA bitstream */ \
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"if tftp ${fpga_filename} ; then " \
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"fpga load 0 $loadaddr $filesize ; " \
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"bridge enable ; " \
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"fi\0" \
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"addcons=" \
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"setenv bootargs ${bootargs} " \
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"console=${consdev},${baudrate}\0" \
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"addip=" \
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"setenv bootargs ${bootargs} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:" \
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"${netmask}:${hostname}:${netdev}:off\0" \
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"addmisc=" \
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"setenv bootargs ${bootargs} ${miscargs}\0" \
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"addargs=run addcons addmisc\0" \
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"mmcload=" \
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"mmc rescan ; " \
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"load mmc 0:2 ${kernel_addr_r} ${bootfile}\0" \
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"netload=" \
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"tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
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"miscargs=nohlt panic=1\0" \
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"mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \
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"nfsargs=" \
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"setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath},v3,tcp\0" \
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"mmc_mmc=" \
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"run mmcload mmcargs addargs ; " \
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"bootm ${kernel_addr_r}\0" \
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"mmc_nfs=" \
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"run mmcload nfsargs addip addargs ; " \
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"bootm ${kernel_addr_r}\0" \
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"net_mmc=" \
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"run netload mmcargs addargs ; " \
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"bootm ${kernel_addr_r}\0" \
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"net_nfs=" \
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"run netload nfsargs addip addargs ; " \
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"bootm ${kernel_addr_r}\0" \
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"try_bootscript=" \
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"mmc rescan;" \
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"if test -e mmc 0:2 ${bootscript} ; then " \
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"if load mmc 0:2 ${kernel_addr_r} ${bootscript};" \
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"then ; " \
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"echo Running bootscript... ; " \
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"source ${kernel_addr_r} ; " \
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"fi ; " \
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"fi\0"
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/* The rest of the configuration is shared */
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#include <configs/socfpga_common.h>
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#endif /* __CONFIG_DENX_MCVEVK_H__ */
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