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https://github.com/AsahiLinux/u-boot
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bdccc4fedc
* Patch by Brad Parker, 02 Aug 2003: fix sc520_cdp problems * Implement Boot Cycle Detection (Req. 2.3 of OSDL CGL Reqirements) * Allow erase command to cross flash bank boundaries
138 lines
3.1 KiB
C
138 lines
3.1 KiB
C
/*
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* (C) Copyright 2000-2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <commproc.h>
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#ifdef CFG_ALLOC_DPRAM
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int dpram_init (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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/* Reclaim the DP memory for our use. */
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gd->dp_alloc_base = CPM_DATAONLY_BASE;
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gd->dp_alloc_top = CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE;
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return (0);
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}
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/* Allocate some memory from the dual ported ram. We may want to
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* enforce alignment restrictions, but right now everyone is a good
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* citizen.
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*/
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uint dpram_alloc (uint size)
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{
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DECLARE_GLOBAL_DATA_PTR;
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uint addr = gd->dp_alloc_base;
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if ((gd->dp_alloc_base + size) >= gd->dp_alloc_top)
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return (CPM_DP_NOSPACE);
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gd->dp_alloc_base += size;
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return addr;
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}
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uint dpram_base (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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return gd->dp_alloc_base;
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}
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/* Allocate some memory from the dual ported ram. We may want to
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* enforce alignment restrictions, but right now everyone is a good
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* citizen.
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*/
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uint dpram_alloc_align (uint size, uint align)
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{
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DECLARE_GLOBAL_DATA_PTR;
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uint addr, mask = align - 1;
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addr = (gd->dp_alloc_base + mask) & ~mask;
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if ((addr + size) >= gd->dp_alloc_top)
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return (CPM_DP_NOSPACE);
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gd->dp_alloc_base = addr + size;
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return addr;
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}
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uint dpram_base_align (uint align)
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{
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DECLARE_GLOBAL_DATA_PTR;
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uint mask = align - 1;
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return (gd->dp_alloc_base + mask) & ~mask;
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}
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#endif /* CFG_ALLOC_DPRAM */
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#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
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void post_word_store (ulong a)
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{
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volatile void *save_addr =
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((immap_t *) CFG_IMMR)->im_cpm.cp_dpmem + CPM_POST_WORD_ADDR;
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*(volatile ulong *) save_addr = a;
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}
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ulong post_word_load (void)
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{
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volatile void *save_addr =
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((immap_t *) CFG_IMMR)->im_cpm.cp_dpmem + CPM_POST_WORD_ADDR;
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return *(volatile ulong *) save_addr;
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}
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#endif /* CONFIG_POST || CONFIG_LOGBUFFER*/
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#ifdef CONFIG_BOOTCOUNT_LIMIT
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void bootcount_store (ulong a)
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{
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volatile ulong *save_addr =
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(volatile ulong *)( ((immap_t *) CFG_IMMR)->im_cpm.cp_dpmem +
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CPM_BOOTCOUNT_ADDR );
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save_addr[0] = a;
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save_addr[1] = BOOTCOUNT_MAGIC;
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}
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ulong bootcount_load (void)
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{
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volatile ulong *save_addr =
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(volatile ulong *)( ((immap_t *) CFG_IMMR)->im_cpm.cp_dpmem +
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CPM_BOOTCOUNT_ADDR );
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if (save_addr[1] != BOOTCOUNT_MAGIC)
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return 0;
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else
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return save_addr[0];
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}
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#endif /* CONFIG_BOOTCOUNT_LIMIT */
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