mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-12 14:23:00 +00:00
64f79f88a7
Add sfc and flash node to device tree and config options to enable support for booting from SPI NOR flash on Radxa ROCK 3 Model A. Unlike prior generation SoCs the BootRom in RK3568 can read all data and look for idbloader at 0x8000, same as on SD and eMMC. Use the rksd format and modify the mkimage offset to generate a bootable u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash. The FIT image is loaded from 0x60000. => sf probe SF: Detected mx25u12835f with page size 256 Bytes, erase size 4 KiB, total 16 MiB => load mmc 1:1 10000000 u-boot-rockchip-spi.bin 1384448 bytes read in 119 ms (11.1 MiB/s) => sf update $fileaddr 0 $filesize device 0 offset 0x0, size 0x152000 1179648 bytes written, 204800 bytes skipped in 9.901s, speed 143185 B/s Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
81 lines
1 KiB
Text
81 lines
1 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* (C) Copyright 2021 Rockchip Electronics Co., Ltd
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*/
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#include "rockchip-u-boot.dtsi"
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/ {
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aliases {
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mmc0 = &sdhci;
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mmc1 = &sdmmc0;
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};
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chosen {
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u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc0;
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};
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dmc: dmc {
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compatible = "rockchip,rk3568-dmc";
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bootph-all;
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status = "okay";
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};
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otp: nvmem@fe38c000 {
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compatible = "rockchip,rk3568-otp";
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reg = <0x0 0xfe38c000 0x0 0x4000>;
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#address-cells = <1>;
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#size-cells = <1>;
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status = "okay";
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cpu_id: id@a {
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reg = <0x0a 0x10>;
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};
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};
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};
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&xin24m {
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bootph-all;
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status = "okay";
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};
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&cru {
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bootph-all;
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status = "okay";
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};
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&pmucru {
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bootph-all;
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status = "okay";
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};
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&grf {
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bootph-all;
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status = "okay";
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};
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&pmugrf {
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bootph-all;
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status = "okay";
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};
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&sdhci {
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bootph-pre-ram;
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status = "okay";
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};
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&sdmmc0 {
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bootph-pre-ram;
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status = "okay";
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};
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#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
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&binman {
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simple-bin-spi {
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mkimage {
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args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
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offset = <0x8000>;
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};
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};
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};
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#endif
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