mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-05 02:51:00 +00:00
19a4d31c12
Sync the px30 devicetree files from linux-next tree. commit <14ce8069f48b> ("lib/stackdepot: allow optional init and stack_table allocation by kvmalloc() - fixup3") Note, this path even sync rk3326 files as it depends on px30. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
107 lines
1.6 KiB
Text
107 lines
1.6 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
/*
|
|
* Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
|
|
*/
|
|
|
|
/ {
|
|
chosen {
|
|
u-boot,spl-boot-order = &sdmmc;
|
|
};
|
|
|
|
aliases {
|
|
i2c0 = &i2c0;
|
|
i2c1 = &i2c1;
|
|
mmc0 = &sdmmc;
|
|
serial1 = &uart1;
|
|
serial2 = &uart2;
|
|
spi0 = &sfc;
|
|
};
|
|
|
|
dmc {
|
|
u-boot,dm-pre-reloc;
|
|
compatible = "rockchip,px30-dmc", "syscon";
|
|
reg = <0x0 0xff2a0000 0x0 0x1000>;
|
|
};
|
|
|
|
rng: rng@ff0b0000 {
|
|
compatible = "rockchip,cryptov2-rng";
|
|
reg = <0x0 0xff0b0000 0x0 0x4000>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
/* U-Boot clk driver for px30 cannot set GPU_CLK */
|
|
&cru {
|
|
u-boot,dm-pre-reloc;
|
|
assigned-clocks = <&cru PLL_NPLL>,
|
|
<&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
|
|
<&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,
|
|
<&cru PCLK_BUS_PRE>, <&cru PLL_CPLL>;
|
|
|
|
assigned-clock-rates = <1188000000>,
|
|
<200000000>, <200000000>,
|
|
<150000000>, <150000000>,
|
|
<100000000>, <17000000>;
|
|
};
|
|
|
|
&gpio0 {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&gpio1 {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&gpio2 {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&gpio3 {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&grf {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&pmucru {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&pmugrf {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&saradc {
|
|
u-boot,dm-pre-reloc;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdmmc {
|
|
u-boot,dm-pre-reloc;
|
|
|
|
/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
|
|
u-boot,spl-fifo-mode;
|
|
};
|
|
|
|
&sfc {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&{/spi@ff3a0000/flash@0} {
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&uart1 {
|
|
clock-frequency = <24000000>;
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&uart2 {
|
|
clock-frequency = <24000000>;
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&xin24m {
|
|
u-boot,dm-pre-reloc;
|
|
};
|