mirror of
https://github.com/AsahiLinux/u-boot
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31b3829f74
Remove the LED unit addresses and reg properties to fix the following dtc build warnings: arch/arm/dts/o4-imx-nano.dtb: Warning (reg_format): /leds/led@0:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) ... arch/arm/dts/o4-imx-nano.dtb: Warning (avoid_default_addr_size): /leds/led@0: Relying on default #address-cells value Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Oleh Kravchenko <oleg@kaa.org.ua>
235 lines
4.6 KiB
Text
235 lines
4.6 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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// Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua>
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/dts-v1/;
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#include <dt-bindings/leds/common.h>
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#include "o4-imx6ull-nano.dtsi"
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/ {
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model = "O4-iMX-NANO";
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compatible = "out4,o4-imx-nano",
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"out4,o4-imx6ull-nano",
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"fsl,imx6ull";
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aliases {
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mmc1 = &usdhc1;
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};
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chosen {
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stdout-path = &uart1;
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};
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leds {
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compatible = "gpio-leds";
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led0 {
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color = <LED_COLOR_ID_RED>;
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gpios = <&pcf8574a 0 GPIO_ACTIVE_LOW>;
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};
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led1{
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&pcf8574a 1 GPIO_ACTIVE_LOW>;
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};
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led2 {
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gpios = <&pcf8574a 2 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_BLUE>;
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};
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led3 {
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color = <LED_COLOR_ID_RED>;
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gpios = <&pcf8574a 3 GPIO_ACTIVE_LOW>;
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};
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led4{
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&pcf8574a 4 GPIO_ACTIVE_LOW>;
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};
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led5 {
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color = <LED_COLOR_ID_BLUE>;
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gpios = <&pcf8574a 5 GPIO_ACTIVE_LOW>;
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};
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};
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usbotg1_vbus: reg_usbotg1_vbus {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&pcf8574a 6 GPIO_ACTIVE_HIGH>;
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regulator-max-microvolt = <5000000>;
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regulator-min-microvolt = <5000000>;
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regulator-name = "usb0";
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};
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usbotg2_vbus: reg_usbotg2_vbus {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&pcf8574a 7 GPIO_ACTIVE_HIGH>;
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regulator-max-microvolt = <5000000>;
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regulator-min-microvolt = <5000000>;
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regulator-name = "usb1";
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};
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};
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&iomuxc {
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
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MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10069
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MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
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MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
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MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
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MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
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MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
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MX6UL_PAD_UART1_RTS_B__USDHC1_CD_B 0x03029
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>;
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};
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pinctrl_mdio: mdiogrp {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
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MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
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MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0xb0b0 /* RST */
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6UL_PAD_CSI_HSYNC__I2C2_SCL 0x4001b8b0
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MX6UL_PAD_CSI_VSYNC__I2C2_SDA 0x4001b8b0
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>;
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};
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pinctrl_i2c2_gpio: i2c2gpiogrp {
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fsl,pins = <
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MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x1b8b0
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MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b8b0
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>;
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};
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pinctrl_can1: can1grp {
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fsl,pins = <
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MX6UL_PAD_LCD_DATA08__FLEXCAN1_TX 0x1b020
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MX6UL_PAD_LCD_DATA09__FLEXCAN1_RX 0x1b020
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
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MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
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MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1
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>;
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};
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};
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&uart1 {
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pinctrl-0 = <&pinctrl_uart1>;
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pinctrl-names = "default";
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status = "okay";
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};
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&usdhc1 {
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bus-width = <4>;
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no-1-8-v;
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pinctrl-0 = <&pinctrl_usdhc1>;
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pinctrl-names = "default";
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status = "okay";
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wakeup-source;
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};
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&fec1 {
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phy-handle = <&phy0>;
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phy-mode = "rmii";
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pinctrl-0 = <&pinctrl_fec1>;
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pinctrl-names = "default";
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status = "okay";
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};
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&fec2 {
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phy-handle = <&phy1>;
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phy-mode = "rmii";
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phy-reset-duration = <250>;
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phy-reset-post-delay = <100>;
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phy-reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
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pinctrl-0 = <&pinctrl_fec2 &pinctrl_mdio>;
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pinctrl-names = "default";
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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phy0: ethernet-phy@0 {
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clocks = <&clks IMX6UL_CLK_ENET_REF>;
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clock-names = "rmii-ref";
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interrupt-parent = <&gpio5>;
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interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
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pinctrl-0 = <&pinctrl_phy0_irq>;
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pinctrl-names = "default";
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reg = <0>;
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};
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phy1: ethernet-phy@1 {
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clocks = <&clks IMX6UL_CLK_ENET2_REF>;
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clock-names = "rmii-ref";
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interrupt-parent = <&gpio5>;
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interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
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pinctrl-0 = <&pinctrl_phy1_irq>;
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pinctrl-names = "default";
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reg = <1>;
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};
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};
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};
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&usbotg1 {
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dr_mode = "host";
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status = "okay";
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vbus-supply = <&usbotg1_vbus>;
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};
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&usbotg2 {
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dr_mode = "host";
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status = "okay";
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vbus-supply = <&usbotg2_vbus>;
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};
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&i2c2 {
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clock_frequency = <100000>;
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pinctrl-0 = <&pinctrl_i2c2>;
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pinctrl-1 = <&pinctrl_i2c2_gpio>;
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pinctrl-names = "default", "gpio";
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scl-gpios = <&gpio4 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio4 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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pcf8574a: gpio@38 {
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compatible = "nxp,pcf8574a";
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#gpio-cells = <2>;
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gpio-controller;
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reg = <0x38>;
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};
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can1>;
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status = "okay";
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};
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&uart2 {
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linux,rs485-enabled-at-boot-time;
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pinctrl-0 = <&pinctrl_uart2>;
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pinctrl-names = "default";
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status = "okay";
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uart-has-rtscts;
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};
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