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a2d6fbf5ff
In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
188 lines
4.6 KiB
Text
188 lines
4.6 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) 2019
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* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
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*/
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#include "armv7-m.dtsi"
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/imxrt1050-clock.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/memory/imxrt-sdram.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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display0 = &lcdif;
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gpio0 = &gpio1;
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gpio1 = &gpio2;
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gpio2 = &gpio3;
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gpio3 = &gpio4;
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gpio4 = &gpio5;
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mmc0 = &usdhc1;
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serial0 = &lpuart1;
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usbphy0 = &usbphy1;
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};
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clocks {
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osc: osc {
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compatible = "fsl,imx-osc", "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24000000>;
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};
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};
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soc {
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semc: semc@402f0000 {
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compatible = "fsl,imxrt-semc";
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reg = <0x402f0000 0x4000>;
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clocks = <&clks IMXRT1050_CLK_SEMC>;
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pinctrl-0 = <&pinctrl_semc>;
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pinctrl-names = "default";
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status = "okay";
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};
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lpuart1: serial@40184000 {
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compatible = "fsl,imxrt-lpuart";
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reg = <0x40184000 0x4000>;
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interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMXRT1050_CLK_LPUART1>;
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clock-names = "per";
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status = "disabled";
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};
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iomuxc: iomuxc@401f8000 {
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compatible = "fsl,imxrt-iomuxc";
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reg = <0x401f8000 0x4000>;
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fsl,mux_mask = <0x7>;
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};
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anatop: anatop@400d8000 {
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compatible = "fsl,imxrt-anatop";
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reg = <0x400d8000 0x4000>;
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};
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clks: ccm@400fc000 {
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compatible = "fsl,imxrt1050-ccm";
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reg = <0x400fc000 0x4000>;
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interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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#clock-cells = <1>;
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};
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usdhc1: usdhc@402c0000 {
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compatible = "fsl,imxrt-usdhc";
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reg = <0x402c0000 0x10000>;
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interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMXRT1050_CLK_USDHC1>;
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clock-names = "per";
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bus-width = <4>;
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fsl,tuning-start-tap = <20>;
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fsl,tuning-step= <2>;
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status = "disabled";
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};
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gpio1: gpio@401b8000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x401b8000 0x4000>;
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interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio2: gpio@401bc000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x401bc000 0x4000>;
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interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio3: gpio@401c0000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x401c0000 0x4000>;
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interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio4: gpio@401c4000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x401c4000 0x4000>;
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interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio5: gpio@400c0000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x400c0000 0x4000>;
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interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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lcdif: lcdif@402b8000 {
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compatible = "fsl,imxrt-lcdif";
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reg = <0x402b8000 0x4000>;
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interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMXRT1050_CLK_LCDIF_PIX>,
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<&clks IMXRT1050_CLK_LCDIF_APB>;
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clock-names = "pix", "axi";
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assigned-clocks = <&clks IMXRT1050_CLK_LCDIF_SEL>;
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assigned-clock-parents = <&clks IMXRT1050_CLK_PLL5_VIDEO>;
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status = "disabled";
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};
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gpt1: gpt1@401ec000 {
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compatible = "fsl,imxrt-gpt";
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reg = <0x401ec000 0x4000>;
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interrupts = <100>;
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clocks = <&osc>;
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status = "disabled";
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};
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usbphy1: usbphy@400d9000 {
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compatible = "fsl,imxrt-usbphy";
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reg = <0x400d9000 0x1000>;
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interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
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};
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usbmisc: usbmisc@402e0800 {
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#index-cells = <1>;
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compatible = "fsl,imxrt-usbmisc";
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reg = <0x402e0800 0x200>;
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clocks = <&clks IMXRT1050_CLK_USBOH3>;
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};
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usbotg1: usb@402e0000 {
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compatible = "fsl,imxrt-usb", "fsl,imx27-usb";
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reg = <0x402e0000 0x200>;
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interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMXRT1050_CLK_USBOH3>;
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fsl,usbphy = <&usbphy1>;
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fsl,usbmisc = <&usbmisc 0>;
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ahb-burst-config = <0x0>;
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tx-burst-size-dword = <0x10>;
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rx-burst-size-dword = <0x10>;
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status = "disabled";
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};
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};
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};
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