mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-05 19:10:13 +00:00
4ddaa6ce28
Sync all dra7* specific dts files with the upstream kernel including changes queued for 4.14 https://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git/log/?h=omap-for-v4.14/dt-v3 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
258 lines
4.8 KiB
Text
258 lines
4.8 KiB
Text
/*
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* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clk/ti-dra7-atl.h>
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#include <dt-bindings/input/input.h>
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/ {
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chosen {
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stdout-path = &uart1;
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};
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extcon_usb1: extcon_usb1 {
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compatible = "linux,extcon-usb-gpio";
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id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
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};
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sound0: sound0 {
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compatible = "simple-audio-card";
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simple-audio-card,name = "DRA7xx-EVM";
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simple-audio-card,widgets =
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"Headphone", "Headphone Jack",
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"Line", "Line Out",
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"Microphone", "Mic Jack",
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"Line", "Line In";
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simple-audio-card,routing =
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"Headphone Jack", "HPLOUT",
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"Headphone Jack", "HPROUT",
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"Line Out", "LLOUT",
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"Line Out", "RLOUT",
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"MIC3L", "Mic Jack",
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"MIC3R", "Mic Jack",
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"Mic Jack", "Mic Bias",
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"LINE1L", "Line In",
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"LINE1R", "Line In";
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simple-audio-card,format = "dsp_b";
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simple-audio-card,bitclock-master = <&sound0_master>;
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simple-audio-card,frame-master = <&sound0_master>;
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simple-audio-card,bitclock-inversion;
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sound0_master: simple-audio-card,cpu {
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sound-dai = <&mcasp3>;
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system-clock-frequency = <5644800>;
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};
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simple-audio-card,codec {
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sound-dai = <&tlv320aic3106>;
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clocks = <&atl_clkin2_ck>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led0 {
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label = "dra7:usr1";
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gpios = <&pcf_lcd 4 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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led1 {
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label = "dra7:usr2";
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gpios = <&pcf_lcd 5 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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led2 {
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label = "dra7:usr3";
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gpios = <&pcf_lcd 6 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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led3 {
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label = "dra7:usr4";
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gpios = <&pcf_lcd 7 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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autorepeat;
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USER1 {
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label = "btnUser1";
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linux,code = <BTN_0>;
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gpios = <&pcf_lcd 2 GPIO_ACTIVE_LOW>;
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};
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USER2 {
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label = "btnUser2";
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linux,code = <BTN_1>;
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gpios = <&pcf_lcd 3 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&i2c3 {
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status = "okay";
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clock-frequency = <400000>;
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};
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&mcspi1 {
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status = "okay";
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};
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&mcspi2 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
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<&dra7_pmx_core 0x3e0>;
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};
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&uart2 {
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status = "okay";
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};
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&uart3 {
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status = "okay";
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};
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&qspi {
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status = "okay";
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spi-max-frequency = <76800000>;
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m25p80@0 {
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compatible = "s25fl256s1";
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spi-max-frequency = <76800000>;
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reg = <0>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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#address-cells = <1>;
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#size-cells = <1>;
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/* MTD partition table.
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* The ROM checks the first four physical blocks
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* for a valid file to boot and the flash here is
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* 64KiB block size.
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*/
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partition@0 {
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label = "QSPI.SPL";
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reg = <0x00000000 0x000010000>;
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};
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partition@1 {
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label = "QSPI.SPL.backup1";
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reg = <0x00010000 0x00010000>;
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};
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partition@2 {
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label = "QSPI.SPL.backup2";
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reg = <0x00020000 0x00010000>;
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};
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partition@3 {
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label = "QSPI.SPL.backup3";
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reg = <0x00030000 0x00010000>;
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};
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partition@4 {
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label = "QSPI.u-boot";
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reg = <0x00040000 0x00100000>;
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};
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partition@5 {
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label = "QSPI.u-boot-spl-os";
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reg = <0x00140000 0x00080000>;
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};
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partition@6 {
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label = "QSPI.u-boot-env";
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reg = <0x001c0000 0x00010000>;
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};
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partition@7 {
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label = "QSPI.u-boot-env.backup1";
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reg = <0x001d0000 0x0010000>;
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};
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partition@8 {
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label = "QSPI.kernel";
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reg = <0x001e0000 0x0800000>;
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};
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partition@9 {
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label = "QSPI.file-system";
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reg = <0x009e0000 0x01620000>;
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};
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};
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};
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&omap_dwc3_1 {
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extcon = <&extcon_usb1>;
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};
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&usb1 {
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dr_mode = "otg";
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extcon = <&extcon_usb1>;
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};
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&usb2 {
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dr_mode = "host";
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};
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&atl {
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assigned-clocks = <&abe_dpll_sys_clk_mux>,
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<&atl_gfclk_mux>,
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<&dpll_abe_ck>,
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<&dpll_abe_m2x2_ck>,
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<&atl_clkin2_ck>;
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assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>;
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assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <5644800>;
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status = "okay";
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atl2 {
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bws = <DRA7_ATL_WS_MCASP2_FSX>;
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aws = <DRA7_ATL_WS_MCASP3_FSX>;
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};
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};
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&mcasp3 {
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#sound-dai-cells = <0>;
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assigned-clocks = <&mcasp3_ahclkx_mux>;
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assigned-clock-parents = <&atl_clkin2_ck>;
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status = "okay";
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op-mode = <0>; /* MCASP_IIS_MODE */
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tdm-slots = <2>;
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/* 4 serializer */
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serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
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1 2 0 0
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>;
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tx-num-evt = <32>;
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rx-num-evt = <32>;
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};
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&mailbox5 {
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status = "okay";
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mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
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status = "okay";
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};
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mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
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status = "okay";
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};
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};
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&mailbox6 {
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status = "okay";
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mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
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status = "okay";
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};
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mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
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status = "okay";
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};
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};
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