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https://github.com/AsahiLinux/u-boot
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f29eaadeb5
This patch adds the dtsi/dts files needed to support the Marvell Octeon TX2 CN913x DB. This is only the base port with not all interfaces supported fully. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
316 lines
5.9 KiB
Text
316 lines
5.9 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018-2021 Marvell International Ltd.
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*/
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#include "cn9130.dtsi" /* include SoC device tree */
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#include "cn9130-db-dev-info.dtsi"
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/ {
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model = "DB-CN-9130";
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compatible = "marvell,cn9130-db", "marvell,cn91xx", "marvell,cn9030-vd",
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"marvell,cn9030", "marvell,armada-ap806-quad",
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"marvell,armada-ap806";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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aliases {
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i2c0 = &cp0_i2c0;
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gpio0 = &ap_gpio0;
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gpio1 = &cp0_gpio0;
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gpio2 = &cp0_gpio1;
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};
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memory@00000000 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>;
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};
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cp0 {
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config-space {
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i2c@701000 {
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/* U36 */
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expander0: pca953x@21 {
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compatible = "nxp,pca9555";
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#gpio-cells = <2>;
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reg = <0x21>;
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status = "okay";
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};
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};
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sdhci@780000 {
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vqmmc-supply = <&cp0_reg_sd_vccq>;
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vmmc-supply = <&cp0_reg_sd_vcc>;
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};
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ap_reg_mmc_vccq: ap_mmc_vccq@0 {
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compatible = "regulator-gpio";
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regulator-name = "ap_mmc_vccq";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&expander0 8 GPIO_ACTIVE_HIGH>;
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states = <1800000 0x1
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3300000 0x0>;
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};
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cp0_reg_usb3_vbus0: cp0_usb3_vbus@0 {
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compatible = "regulator-fixed";
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regulator-name = "cp0-xhci0-vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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startup-delay-us = <100000>;
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regulator-force-boot-off;
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gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
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};
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cp0_reg_usb3_vbus1: cp0_usb3_vbus@1 {
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compatible = "regulator-fixed";
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regulator-name = "cp0-xhci1-vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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startup-delay-us = <100000>;
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regulator-force-boot-off;
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gpio = <&expander0 1 GPIO_ACTIVE_HIGH>;
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};
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cp0_reg_sd_vccq: cp0_sd_vccq@0 {
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compatible = "regulator-gpio";
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regulator-name = "cp0_sd_vccq";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&expander0 15 GPIO_ACTIVE_HIGH>;
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states = <1800000 0x1
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3300000 0x0>;
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};
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cp0_reg_sd_vcc: cp0_sd_vcc@0 {
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compatible = "regulator-fixed";
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regulator-name = "cp0_sd_vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-always-on;
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};
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cp0_reg_usb3_current_lim0:cp0_usb3_current_limiter@0 {
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compatible = "regulator-fixed";
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regulator-min-microamp = <900000>;
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regulator-max-microamp = <900000>;
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regulator-force-boot-off;
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gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
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};
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cp0_reg_usb3_current_lim1: cp0_usb3_current_limiter@1 {
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compatible = "regulator-fixed";
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regulator-min-microamp = <900000>;
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regulator-max-microamp = <900000>;
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regulator-force-boot-off;
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gpio = <&expander0 5 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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/*
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* AP related configuration
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*/
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&ap_pinctl {
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/* MPP Bus:
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* SDIO [0-10, 12]
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* UART0 [11,19]
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*/
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/* 0 1 2 3 4 5 6 7 8 9 */
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pin-func = < 1 1 1 1 1 1 1 1 1 1
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1 3 1 0 0 0 0 0 0 3 >;
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};
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/* on-board eMMC - U9 */
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&ap_sdhci0 {
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pinctrl-names = "default";
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pinctrl-0 = <&ap_emmc_pins>;
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vqmmc-supply = <&ap_reg_mmc_vccq>;
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bus-width = <8>;
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mmc-ddr-1_8v;
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mmc-hs400-1_8v;
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status = "okay";
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};
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/*
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* CP related configuration
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*/
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&cp0_pinctl {
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cp0_nand_pins: cp0-nand-pins {
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marvell,pins = <15 16 17 18 19 20 21 22 23 24 25 26 27 >;
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marvell,function = <1>;
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};
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cp0_nand_rb: cp0-nand-rb {
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marvell,pins = < 13 >;
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marvell,function = <2>;
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};
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};
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/*
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* CP0
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*/
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&cp0_i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_i2c0_pins>;
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status = "okay";
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clock-frequency = <100000>;
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};
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&cp0_i2c1 {
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status = "okay";
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};
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/* CON 28 */
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&cp0_sdhci0 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_sdhci_pins>;
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bus-width = <4>;
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status = "okay";
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};
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/* U54 */
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&cp0_nand {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_nand_pins &cp0_nand_rb>;
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status = "disabled";
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};
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/* U55 */
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&cp0_spi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_spi0_pins>;
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reg = <0x700680 0x50>, /* control */
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<0x2000000 0x1000000>, /* CS0 */
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<0 0xffffffff>, /* CS1 */
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<0 0xffffffff>, /* CS2 */
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<0 0xffffffff>; /* CS3 */
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status = "disabled";
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spi-flash@0 {
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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compatible = "jedec,spi-nor", "spi-flash";
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reg = <0x0>;
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/* On-board MUX does not allow higher frequencies */
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spi-max-frequency = <40000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "U-Boot";
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reg = <0x0 0x200000>;
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};
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partition@400000 {
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label = "Filesystem";
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reg = <0x200000 0xe00000>;
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};
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};
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};
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};
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&cp0_comphy {
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phy0 {
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phy-type = <COMPHY_TYPE_PEX0>;
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};
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phy1 {
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phy-type = <COMPHY_TYPE_PEX0>;
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};
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phy2 {
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phy-type = <COMPHY_TYPE_PEX0>;
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};
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phy3 {
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phy-type = <COMPHY_TYPE_PEX0>;
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};
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phy4 {
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phy-type = <COMPHY_TYPE_SFI0>;
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phy-speed = <COMPHY_SPEED_10_3125G>;
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};
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phy5 {
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phy-type = <COMPHY_TYPE_SATA1>;
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};
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};
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/* SLM-1521-V2, CON6 */
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&cp0_pcie0 {
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num-lanes = <4>;
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status = "disabled";
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};
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&cp0_mdio {
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status = "okay";
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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phy1: ethernet-phy@1 {
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reg = <1>;
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};
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};
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&cp0_ethernet {
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status = "okay";
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};
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/* SLM-1521-V2, CON9 */
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&cp0_eth0 {
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status = "okay";
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phy-mode = "sfi";
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};
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/* CON56 */
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&cp0_eth1 {
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status = "okay";
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phy = <&phy0>;
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phy-mode = "rgmii-id";
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};
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/* CON57 */
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&cp0_eth2 {
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status = "okay";
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phy = <&phy1>;
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phy-mode = "rgmii-id";
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};
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/* SLM-1521-V2, CON2 */
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&cp0_sata0 {
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status = "okay";
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};
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&cp0_utmi0 {
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status = "okay";
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};
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&cp0_utmi1 {
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status = "okay";
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};
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&cp0_usb3_0 {
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status = "okay";
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vbus-supply = <&cp0_reg_usb3_vbus0>;
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current-limiter = <&cp0_reg_usb3_current_lim0>;
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vbus-disable-delay = <500>;
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};
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&cp0_usb3_1 {
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status = "okay";
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vbus-supply = <&cp0_reg_usb3_vbus1>;
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current-limiter = <&cp0_reg_usb3_current_lim1>;
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vbus-disable-delay = <500>;
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};
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&cp0_pcie0 {
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status = "okay";
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};
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