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https://github.com/AsahiLinux/u-boot
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66425ca694
Add a node leds to support the LED IP in the device tree of the bcm6753. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
208 lines
3.9 KiB
Text
208 lines
3.9 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2022 Philippe Reynes <philippe.reynes@softathome.com>
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*/
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#include "skeleton.dtsi"
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/ {
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compatible = "brcm,bcm6753";
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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u-boot,dm-pre-reloc;
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cpu0: cpu@0 {
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compatible = "arm,cortex-a7";
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device_type = "cpu";
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reg = <0x0>;
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next-level-cache = <&l2>;
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u-boot,dm-pre-reloc;
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};
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cpu1: cpu@1 {
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compatible = "arm,cortex-a7";
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device_type = "cpu";
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reg = <0x1>;
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next-level-cache = <&l2>;
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u-boot,dm-pre-reloc;
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};
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cpu2: cpu@2 {
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compatible = "arm,cortex-a7";
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device_type = "cpu";
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reg = <0x2>;
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next-level-cache = <&l2>;
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u-boot,dm-pre-reloc;
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};
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l2: l2-cache0 {
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compatible = "cache";
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u-boot,dm-pre-reloc;
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};
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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u-boot,dm-pre-reloc;
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periph_osc: periph-osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <200000000>;
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u-boot,dm-pre-reloc;
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};
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hsspi_pll: hsspi-pll {
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compatible = "fixed-factor-clock";
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#clock-cells = <0>;
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clocks = <&periph_osc>;
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clock-mult = <2>;
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clock-div = <1>;
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};
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refclk50mhz: refclk50mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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};
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};
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ubus {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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u-boot,dm-pre-reloc;
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uart0: serial@ff812000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0xff812000 0x1000>;
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clock = <50000000>;
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status = "disabled";
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};
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wdt1: watchdog@ff800480 {
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compatible = "brcm,bcm6345-wdt";
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reg = <0xff800480 0x14>;
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clocks = <&refclk50mhz>;
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};
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wdt2: watchdog@ff8004c0 {
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compatible = "brcm,bcm6345-wdt";
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reg = <0xff8004c0 0x14>;
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clocks = <&refclk50mhz>;
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};
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wdt-reboot {
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compatible = "wdt-reboot";
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wdt = <&wdt1>;
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};
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gpio0: gpio-controller@0xff800500 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0xff800500 0x4>,
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<0xff800520 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpio1: gpio-controller@0xff800504 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0xff800504 0x4>,
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<0xff800524 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpio2: gpio-controller@0xff800508 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0xff800508 0x4>,
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<0xff800528 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpio3: gpio-controller@0xff80050c {
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compatible = "brcm,bcm6345-gpio";
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reg = <0xff80050c 0x4>,
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<0xff80052c 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpio4: gpio-controller@0xff800510 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0xff800510 0x4>,
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<0xff800530 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpio5: gpio-controller@0xff800514 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0xff800514 0x4>,
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<0xff800534 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpio6: gpio-controller@0xff800518 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0xff800518 0x4>,
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<0xff800538 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpio7: gpio-controller@0xff80051c {
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compatible = "brcm,bcm6345-gpio";
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reg = <0xff80051c 0x4>,
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<0xff80053c 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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nand: nand-controller@ff801800 {
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compatible = "brcm,nand-bcm6753",
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"brcm,brcmnand-v5.0",
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"brcm,brcmnand";
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reg-names = "nand", "nand-int-base", "nand-cache";
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reg = <0xff801800 0x180>,
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<0xff802000 0x10>,
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<0xff801c00 0x200>;
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parameter-page-big-endian = <0>;
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status = "disabled";
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};
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leds: led-controller@ff803000 {
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compatible = "brcm,bcm6753-leds";
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reg = <0xff803000 0x3480>;
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status = "disabled";
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};
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};
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};
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