mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-05 11:00:15 +00:00
6337d53fdf
There have been several changes to the am33xx.dtsi, so this patch re-syncs it with Linux. Let's add proper interconnect hierarchy for l4 interconnect instances with the related ti-sysc interconnect module data as documented in Documentation/devicetree/bindings/bus/ti-sysc.txt of the Linux kernel. With l4 interconnect hierarchy and ti-sysc interconnect target module data in place, we can simply move all the related child devices to their proper location and enable probing using ti-sysc. The am33xx-clock.dtsi file is the same as that of the Linux kernel, except for the reg property of the node l4-wkup-clkctrl@0. As for the am33xx.dtsi file, all the devices with drivers not yet implemented and those I was able to test with this patch have been moved to am33xx-l4.dtsi. In case of any regressions, problem devices can be reverted by moving them back and removing the related interconnect target module node. Signed-off-by: Dario Binacchi <dariobin@libero.it>
600 lines
15 KiB
Text
600 lines
15 KiB
Text
/*
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* Copyright (C) 2014 DENX Software Engineering GmbH
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* Heiko Schocher <hs@denx.de>
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*
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* Based on:
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "am33xx.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "RUT";
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compatible = "ti,am335x-evm", "ti,am33xx";
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buzzer {
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compatible = "pwm-beeper";
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pwms = <&ecap0 0 16000 0>;
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};
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chosen {
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stdout-path = &uart0;
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tick-timer = &timer2;
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};
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cpus {
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cpu@0 {
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cpu0-supply = <&dcdc2_reg>;
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};
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};
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gpio_keys: powerfail-keys {
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compatible = "gpio-keys";
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autorepeat;
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pwr-fail0 {
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label = "power-fail";
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linux,code = <KEY_POWER>;
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gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
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gpio-key,wakeup;
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};
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pwr-fail1 {
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label = "power-fail-redundant";
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linux,code = <KEY_POWER>;
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gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
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gpio-key,wakeup;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_green {
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label = "rut:green:debug:run_mode";
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gpios = <&gpio3 20 1>;
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/* activelow = 1, default trigger heartbeat */
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};
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led_yellow {
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label = "rut:debug:yellow:osc_ch1";
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gpios = <&gpio0 17 1>;
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/* activelow = 1, default trigger mmc0 */
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};
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led_red {
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label = "rut:debug:red:osc_ch2";
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gpios = <&gpio0 16 1>;
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/* activelow = 1, default trigger debug_osc_ch2 */
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};
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/* optional */
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led_alive {
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label = "rut:alive";
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gpios = <&gpio0 15 1>;
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linux,default-trigger = "heartbeat";
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/* activelow = 1, default trigger heartbeat */
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};
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};
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memory {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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panel {
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compatible = "ti,tilcdc,panel";
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_pins_s0>;
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status = "okay";
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/* FORMIKE_KWH043ST20_F01 */
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panel-info {
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ac-bias = <255>;
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ac-bias-intrpt = <0>;
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dma-burst-sz = <16>;
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bpp = <16>;
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fdd = <0x80>;
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sync-edge = <0>;
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sync-ctrl = <1>;
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raster-order = <0>;
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fifo-th = <0>;
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tft-alt-mode = <0>;
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invert-pxl-clk = <1>;
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};
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display-timings {
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native-mode = <&timing1>;
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timing1: 480x800p60 {
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clock-frequency = <29925000>;
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hactive = <480>;
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vactive = <800>;
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hfront-porch = <50>;
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hback-porch = <50>;
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hsync-len = <50>;
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vback-porch = <50>;
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vfront-porch = <50>;
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vsync-len = <50>;
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hsync-active = <1>;
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vsync-active = <1>;
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};
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};
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};
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vmmc: fixedregulator3 {
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compatible = "regulator-fixed";
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regulator-name = "vmmc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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watchdog {
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compatible = "linux,wdt-gpio";
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gpios = <&gpio0 14 0>;
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hw_algo = "level";
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hw_margin_ms = <30000>;
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};
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};
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&aes {
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status = "okay";
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};
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&cppi41dma {
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status = "okay";
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};
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&cpsw_emac0 {
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phy-mode = "rmii";
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phy-handle = <ðernet_phy>;
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};
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&davinci_mdio {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&davinci_mdio_default>;
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pinctrl-1 = <&davinci_mdio_sleep>;
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status = "okay";
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gpios = <&gpio2 18 0>;
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ethernet_phy: ethernet-phy@1 {
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compatible = "ethernet-phy-id2000.5ce1";
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reg = <1>;
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natsemi,master_mode_fixup;
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};
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};
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&elm {
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status = "okay";
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};
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&epwmss0 {
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status = "okay";
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ecap0: ecap@100 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&ecap0_pins>;
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};
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};
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&epwmss1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&epwmss1_pins>;
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};
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&gpmc {
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pinctrl-names = "default";
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pinctrl-0 = <&nandflash_pins>;
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status = "okay";
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ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
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nand@0,0 {
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reg = <0 0 0>; /* CS0, offset 0 */
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nand-bus-width = <8>;
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ti,nand-ecc-opt = "bch8";
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gpmc,device-nand = "true";
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gpmc,device-width = <1>;
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <57>;
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gpmc,cs-wr-off-ns = <57>;
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gpmc,adv-on-ns = <0>;
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gpmc,adv-rd-off-ns = <57>;
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gpmc,adv-wr-off-ns = <57>;
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gpmc,we-on-ns = <0>;
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gpmc,we-off-ns = <48>;
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gpmc,oe-on-ns = <0>;
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gpmc,oe-off-ns = <57>;
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gpmc,access-ns = <38>;
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gpmc,rd-cycle-ns = <67>;
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gpmc,wr-cycle-ns = <67>;
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gpmc,wait-on-read = "true";
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gpmc,wait-on-write = "true";
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gpmc,bus-turnaround-ns = <0>;
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gpmc,cycle2cycle-delay-ns = <0>;
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gpmc,clk-activation-ns = <0>;
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gpmc,wait-monitoring-ns = <0>;
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gpmc,wr-access-ns = <96>;
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gpmc,wr-data-mux-bus-ns = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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elm_id = <&elm>;
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};
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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clock-frequency = <400000>;
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status = "okay";
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eeprom: eeprom@50 {
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compatible = "atmel,24c128";
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reg = <0x50>;
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pagesize = <32>;
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};
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tps: tps@24 {
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reg = <0x24>;
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};
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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clock-frequency = <100000>;
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status = "okay";
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atmel: atmel_mxt_ts@4a {
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compatible = "atmel,maxtouch";
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reg = <0x4a>;
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interrupt-parent = <&gpio1>;
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interrupts = <28 8>;
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gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
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};
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temp@48 {
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compatible = "st,ds75";
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reg = <0x4c>;
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};
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};
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&lcdc {
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status = "okay";
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};
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&mac {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&cpsw_default>;
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pinctrl-1 = <&cpsw_sleep>;
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status = "okay";
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};
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&mmc1 {
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vmmc-supply = <&vmmc>;
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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status = "okay";
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};
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&phy_sel {
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rmii-clock-ext;
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};
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&sham {
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status = "okay";
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_pins>;
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status = "okay";
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spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "mx25l25635e";
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reg = <0>; /* Chip select 0 */
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spi-max-frequency = <24000000>;
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partition@0 {
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label = "dummy";
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reg = <0x0000000 0x8000>;
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};
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};
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};
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&spi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi1_pins>;
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status = "okay";
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lcd_init: lcd@0 {
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compatible = "formike,kwh043st20";
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reg = <0>;
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reset-gpios = <&gpio3 19 0>;
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spi-max-frequency = <1200000>;
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spi-cpol;
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spi-cpha;
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power-on-delay = <10>;
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reset-delay = <10>;
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};
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};
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/include/ "tps65217.dtsi"
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&tps {
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backlight0: backlight {
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isel = <1>; /* 1 - ISET1, 2 ISET2 */
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fdim = <1000>; /* TPS65217_BL_FDIM_100HZ */
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default-brightness = <80>;
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};
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regulators {
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dcdc1_reg: regulator@0 {
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regulator-always-on;
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};
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dcdc2_reg: regulator@1 {
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/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
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regulator-name = "vdd_mpu";
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regulator-min-microvolt = <925000>;
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regulator-max-microvolt = <1325000>;
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regulator-boot-on;
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regulator-always-on;
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};
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dcdc3_reg: regulator@2 {
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/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
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regulator-name = "vdd_core";
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regulator-min-microvolt = <925000>;
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regulator-max-microvolt = <1150000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo1_reg: regulator@3 {
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regulator-always-on;
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};
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ldo2_reg: regulator@4 {
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regulator-always-on;
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};
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ldo3_reg: regulator@5 {
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regulator-always-on;
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};
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ldo4_reg: regulator@6 {
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regulator-always-on;
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};
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};
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};
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&tscadc {
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status = "okay";
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adc {
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ti,adc-channels = <4 5 6 7>;
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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&usb {
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status = "okay";
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};
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&usb_ctrl_mod {
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status = "okay";
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};
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&usb0 {
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dr_mode = "device";
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status = "okay";
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};
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&usb0_phy {
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status = "okay";
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};
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&am33xx_pinmux {
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pinctrl-names = "default";
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pinctrl-0 = <&clkout2_pin &gpio_pin>;
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clkout2_pin: pinmux_clkout2_pin {
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pinctrl-single,pins = <
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0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
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>;
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};
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cpsw_default: cpsw_default {
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pinctrl-single,pins = <
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/* Slave 1 */
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0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
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0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.mii1_rxerr */
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0x114 (MUX_MODE1) /* mii1_txen.mii1_txen */
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0x124 (MUX_MODE1) /* mii1_txd1.mii1_txd1 */
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0x128 (MUX_MODE1) /* mii1_txd0.mii1_txd0 */
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0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.mii1_rxd1 */
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0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.mii1_rxd0 */
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0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii1_refclk */
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>;
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};
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cpsw_sleep: cpsw_sleep {
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pinctrl-single,pins = <
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/* Slave 1 reset value */
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0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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>;
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};
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davinci_mdio_default: davinci_mdio_default {
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pinctrl-single,pins = <
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/* MDIO */
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0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
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0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
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>;
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};
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davinci_mdio_sleep: davinci_mdio_sleep {
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pinctrl-single,pins = <
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/* MDIO reset value */
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0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
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>;
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};
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ecap0_pins: ecap_pins {
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pinctrl-single,pins = <
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0x164 (MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 buzzer frequency: ecap.0 */
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>;
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};
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epwmss1_pins: epwmss_pins {
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pinctrl-single,pins = <
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0x48 (PIN_INPUT | MUX_MODE7) /* gpmc_a2.gpio1_18 buzzer frequency: ehrpwm1A high-Z due to connected to ecap0 by R0469 */
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0x4c (MUX_MODE6) /* gpmc_a3.ehrpwm1B buzzer volume pwm */
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>;
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};
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gpio_pin: gpio_pin {
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pinctrl-single,pins = <
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0x6c (PIN_INPUT | MUX_MODE7) /* gpmc_a11.gpio1_27 PWR_FAIL_GPIO_SPARE */
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0x78 (PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) /* gpmc_be1n.gpio1_28 TOUCH_CHANGE_N */
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0x88 (PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) /* gpmc_csn3.gpio2_0 RUT_GPIO0_GPIO */
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0x118 (PIN_INPUT | MUX_MODE7) /* gmii1_rxdv.gpio3_4 PWR_FAIL_GPIO */
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0x11c (MUX_MODE7) /* mii1_txd3.gpio0_16 DEBUG_OSC_CH2_GPIO */
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0x120 (MUX_MODE7) /* mii1_txd2.gpio0_17 DEBUG_OSC_CH1_GPIO */
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0x134 (MUX_MODE7) /* gmii1_rxd3.gpio2_18 PHY_RSTn_GPIO */
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0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gmii1_rxd2.gpio2_19 PHY_INT_GPIO */
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0x180 (MUX_MODE7) /* uart1_rxd.gpio0_14 WATCHDOG_TRIGGER_GPIO */
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0x184 (MUX_MODE7) /* uart1_txd.gpio0_15 ALIVE_LED_N_GPIO */
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0x1a0 (MUX_MODE7) /* mcasp0_aclkr.gpio3_18 MAXTOUCH_RESET_GPIO */
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0x1a4 (MUX_MODE7) /* mcasp0_fsr.gpio3_19 DISPLAY_RESET_GPIO */
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0x1a8 (MUX_MODE7) /* mcasp0_axr1.gpio3_20 DEBUG_RUN_MODE_GPIO */
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0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkx.gpio3_21 NORFLASH_WP_GPIO */
|
|
0x1b0 (PIN_OUTPUT | MUX_MODE3) /* xdma_event_intr0.clkout1 */
|
|
>;
|
|
};
|
|
|
|
i2c0_pins: pinmux_i2c0_pins {
|
|
pinctrl-single,pins = <
|
|
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
|
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
|
>;
|
|
};
|
|
|
|
i2c1_pins: pinmux_i2c1_pins {
|
|
pinctrl-single,pins = <
|
|
0x168 (PIN_INPUT | MUX_MODE3) /* uart0_ctsn.i2c1_sda */
|
|
0x16c (PIN_INPUT | MUX_MODE3) /* uart0.rtsn.i2c1_scl */
|
|
>;
|
|
};
|
|
|
|
lcd_pins_s0: lcd_pins_s0 {
|
|
pinctrl-single,pins = <
|
|
0x20 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad8.lcd_data23 */
|
|
0x24 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad9.lcd_data22 */
|
|
0x28 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad10.lcd_data21 */
|
|
0x2c (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad11.lcd_data20 */
|
|
0x30 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad12.lcd_data19 */
|
|
0x34 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad13.lcd_data18 */
|
|
0x38 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad14.lcd_data17 */
|
|
0x3c (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad15.lcd_data16 */
|
|
0xa0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
|
|
0xa4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
|
|
0xa8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
|
|
0xac (PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
|
|
0xb0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
|
|
0xb4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
|
|
0xb8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
|
|
0xbc (PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
|
|
0xc0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
|
|
0xc4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
|
|
0xc8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
|
|
0xcc (PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
|
|
0xd0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
|
|
0xd4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
|
|
0xd8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
|
|
0xdc (PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
|
|
0xe0 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_vsync.lcd_vsync */
|
|
0xe4 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_hsync.lcd_hsync */
|
|
0xe8 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_pclk.lcd_pclk */
|
|
0xec (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
|
|
>;
|
|
};
|
|
|
|
mmc1_pins: mmc1_pins {
|
|
pinctrl-single,pins = <
|
|
0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
|
0xf4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
|
0xf8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
|
0xfc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
|
0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
|
0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
|
>;
|
|
};
|
|
|
|
nandflash_pins: pinmux_nandflash_pins {
|
|
pinctrl-single,pins = <
|
|
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
|
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
|
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
|
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
|
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
|
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
|
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
|
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
|
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
|
0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
|
|
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
|
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
|
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
|
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
|
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
|
|
>;
|
|
};
|
|
|
|
spi0_pins: pinmux_spi0_pins {
|
|
pinctrl-single,pins = <
|
|
0x150 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_sclk.spi0_sclk */
|
|
0x154 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
|
|
0x158 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* spi0_d1.spi0_d1 */
|
|
0x15c (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_CS0.spi0_CS0 */
|
|
>;
|
|
};
|
|
|
|
spi1_pins: pinmux_spi1_pins {
|
|
pinctrl-single,pins = <
|
|
0x190 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_aclkx.spi1_sclk */
|
|
0x194 (PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
|
|
0x198 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */
|
|
0x19c (PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */
|
|
>;
|
|
};
|
|
|
|
uart0_pins: pinmux_uart0_pins {
|
|
pinctrl-single,pins = <
|
|
0x170 (PIN_INPUT | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
|
0x174 (PIN_OUTPUT | MUX_MODE0) /* uart0_txd.uart0_txd */
|
|
>;
|
|
};
|
|
};
|