.. |
bd82x6x.c
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x86: ivybridge: Set up EHCI USB
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2014-11-25 06:34:01 -07:00 |
car.S
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x86: chromebook_link: Implement CAR support (cache as RAM)
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2014-11-21 07:34:11 +01:00 |
cpu.c
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x86: ivybridge: Add LAPIC support
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2014-11-21 07:34:15 +01:00 |
early_init.c
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x86: ivybridge: Add early init for PCH devices
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2014-11-21 07:34:14 +01:00 |
early_me.c
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x86: ivybridge: Implement SDRAM init
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2014-11-21 07:34:15 +01:00 |
Kconfig
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x86: ivybridge: Implement SDRAM init
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2014-11-21 07:34:15 +01:00 |
lpc.c
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x86: ivybridge: Add additional LPC init
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2014-11-25 06:34:01 -07:00 |
Makefile
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x86: ivybridge: Set up EHCI USB
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2014-11-25 06:34:01 -07:00 |
me_status.c
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x86: ivybridge: Implement SDRAM init
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2014-11-21 07:34:15 +01:00 |
microcode_intel.c
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x86: ivybridge: Perform Intel microcode update on boot
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2014-11-21 07:34:14 +01:00 |
pch.c
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x86: ivybridge: Add PCH init
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2014-11-25 06:34:00 -07:00 |
pci.c
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x86: ivybridge: Add support for BD82x6x PCH
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2014-11-25 06:34:00 -07:00 |
report_platform.c
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x86: ivybridge: Implement SDRAM init
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2014-11-21 07:34:15 +01:00 |
sata.c
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x86: ivybridge: Add SATA init
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2014-11-25 06:34:01 -07:00 |
sdram.c
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x86: ivybridge: Implement SDRAM init
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2014-11-21 07:34:15 +01:00 |
usb_ehci.c
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x86: ivybridge: Set up EHCI USB
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2014-11-25 06:34:01 -07:00 |