Peng Fan 9ba18ff8ef imx: mx6ul/sx: fix mmdc_ch0 clk calculation ... Check "Figure 19-5. BUS clock generation" of i.MX 6SoloX Applications Processor Reference Manual and "Figure 18-5. BUS clock generation" of i.MX 6UltraLite Applications Processor Reference Manual. If mmdc clk sources from pll4_main_clk(pll_audio), the calculation is wrong. Fix mmdc_ch0 clk calculation. Also add PLL_AUDIO/VIDEO support for decode_pll. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>		2016-01-24 12:13:21 +01:00
..
asm	imx: mx6ul/sx: fix mmdc_ch0 clk calculation	2016-01-24 12:13:21 +01:00
debug	arm: debug: replace license blocks with SPDX	2014-10-26 22:22:09 +01:00