mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 23:51:33 +00:00
8bde7f776c
- remove trailing white space, trailing empty lines, C++ comments, etc.
- split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)
* Patches by Kenneth Johansson, 25 Jun 2003:
- major rework of command structure
(work done mostly by Michal Cendrowski and Joakim Kristiansen)
291 lines
7.1 KiB
C
291 lines
7.1 KiB
C
/*
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* (C) Copyright 2002 ELTEC Elektronik AG
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* Frank Gottschling <fgottschling@eltec.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* SRom I/O routines.
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*/
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#include <common.h>
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#include <pci.h>
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#include "srom.h"
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#define SROM_RD 0x00004000 /* Read from Boot ROM */
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#define SROM_WR 0x00002000 /* Write to Boot ROM */
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#define SROM_SR 0x00000800 /* Select Serial ROM when set */
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#define DT_IN 0x00000004 /* Serial Data In */
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#define DT_CLK 0x00000002 /* Serial ROM Clock */
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#define DT_CS 0x00000001 /* Serial ROM Chip Select */
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static u_int dc_srom_iobase;
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/*----------------------------------------------------------------------------*/
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static int inl(u_long addr)
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{
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return le32_to_cpu(*(volatile u_long *)(addr));
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}
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/*----------------------------------------------------------------------------*/
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static void outl (int command, u_long addr)
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{
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*(volatile u_long *)(addr) = cpu_to_le32(command);
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}
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/*----------------------------------------------------------------------------*/
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static void sendto_srom(u_int command, u_long addr)
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{
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outl(command, addr);
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udelay(1);
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return;
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}
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/*----------------------------------------------------------------------------*/
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static int getfrom_srom(u_long addr)
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{
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s32 tmp;
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tmp = inl(addr);
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udelay(1);
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return tmp;
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}
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/*----------------------------------------------------------------------------*/
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static void srom_latch (u_int command, u_long addr)
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{
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sendto_srom (command, addr);
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sendto_srom (command | DT_CLK, addr);
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sendto_srom (command, addr);
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return;
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}
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/*----------------------------------------------------------------------------*/
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static void srom_command_rd (u_int command, u_long addr)
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{
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srom_latch (command, addr);
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srom_latch (command, addr);
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srom_latch ((command & 0x0000ff00) | DT_CS, addr);
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return;
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}
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/*----------------------------------------------------------------------------*/
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static void srom_command_wr (u_int command, u_long addr)
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{
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srom_latch (command, addr);
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srom_latch ((command & 0x0000ff00) | DT_CS, addr);
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srom_latch (command, addr);
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return;
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}
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/*----------------------------------------------------------------------------*/
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static void srom_address(u_int command, u_long addr, u_char offset)
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{
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int i;
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signed char a;
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a = (char)(offset << 2);
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for (i=0; i<6; i++, a <<= 1)
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{
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srom_latch(command | ((a < 0) ? DT_IN : 0), addr);
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}
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udelay(1);
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i = (getfrom_srom(addr) >> 3) & 0x01;
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return;
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}
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/*----------------------------------------------------------------------------*/
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static short srom_data_rd (u_int command, u_long addr)
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{
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int i;
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short word = 0;
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s32 tmp;
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for (i=0; i<16; i++)
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{
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sendto_srom(command | DT_CLK, addr);
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tmp = getfrom_srom(addr);
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sendto_srom(command, addr);
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word = (word << 1) | ((tmp >> 3) & 0x01);
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}
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sendto_srom(command & 0x0000ff00, addr);
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return word;
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}
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/*----------------------------------------------------------------------------*/
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static int srom_data_wr (u_int command, u_long addr, short val)
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{
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int i;
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u_long longVal;
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s32 tmp;
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longVal = (u_long)(le16_to_cpu(val));
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for (i=0; i<16; i++)
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{
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tmp = (longVal & 0x8000)>>13;
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sendto_srom (tmp | command, addr);
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sendto_srom (tmp | command | DT_CLK, addr);
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sendto_srom (tmp | command, addr);
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longVal = longVal<<1;
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}
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sendto_srom(command & 0x0000ff00, addr);
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sendto_srom(command, addr);
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tmp = 100;
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do
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{
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if ((getfrom_srom(dc_srom_iobase) & 0x8) == 0x8)
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break;
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udelay(1000);
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} while (--tmp);
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if (tmp == 0)
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{
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printf("Write DEC21143 SRom timed out !\n");
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return (-1);
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}
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return 0;
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}
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/*----------------------------------------------------------------------------*/
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static short srom_rd (u_long addr, u_char offset)
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{
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sendto_srom (SROM_RD | SROM_SR, addr);
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srom_latch (SROM_RD | SROM_SR | DT_CS, addr);
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srom_command_rd (SROM_RD | SROM_SR | DT_IN | DT_CS, addr);
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srom_address (SROM_RD | SROM_SR | DT_CS, addr, offset);
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return srom_data_rd (SROM_RD | SROM_SR | DT_CS, addr);
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}
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/*----------------------------------------------------------------------------*/
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static void srom_wr_enable (u_long addr)
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{
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int i;
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sendto_srom (SROM_WR | SROM_SR, addr);
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srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
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srom_latch (SROM_WR | SROM_SR | DT_IN | DT_CS, addr);
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srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
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srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
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for (i=0; i<6; i++)
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{
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srom_latch (SROM_WR | SROM_SR | DT_IN | DT_CS, addr);
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}
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}
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/*----------------------------------------------------------------------------*/
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static int srom_wr (u_long addr, u_char offset, short val)
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{
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srom_wr_enable (addr);
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sendto_srom (SROM_WR | SROM_SR, addr);
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srom_latch (SROM_WR | SROM_SR | DT_CS, addr);
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srom_command_wr (SROM_WR | SROM_SR | DT_IN | DT_CS, addr);
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srom_address (SROM_WR | SROM_SR | DT_CS, addr, offset);
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return srom_data_wr (SROM_WR | SROM_SR | DT_CS, addr, val);
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}
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/*----------------------------------------------------------------------------*/
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/*
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* load data from the srom
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*/
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int dc_srom_load (u_short *dest)
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{
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int offset;
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short tmp;
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/* get srom iobase from local network controller */
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pci_read_config_dword(PCI_BDF(0,14,0), PCI_BASE_ADDRESS_1, &dc_srom_iobase);
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dc_srom_iobase &= PCI_BASE_ADDRESS_MEM_MASK;
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dc_srom_iobase = pci_mem_to_phys(PCI_BDF(0,14,0), dc_srom_iobase);
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dc_srom_iobase += 0x48; /* io offset for srom access */
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memset (dest, 0, 128);
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for (offset=0; offset<64; offset++)
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{
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tmp = srom_rd (dc_srom_iobase, offset);
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*dest++ = le16_to_cpu(tmp);
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}
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return (0);
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}
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/*----------------------------------------------------------------------------*/
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/*
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* store data into the srom
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*/
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int dc_srom_store (u_short *src)
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{
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int offset;
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/* get srom iobase from local network controller */
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pci_read_config_dword(PCI_BDF(0,14,0), PCI_BASE_ADDRESS_1, &dc_srom_iobase);
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dc_srom_iobase &= PCI_BASE_ADDRESS_MEM_MASK;
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dc_srom_iobase = pci_mem_to_phys(PCI_BDF(0,14,0), dc_srom_iobase);
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dc_srom_iobase += 0x48; /* io offset for srom access */
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for (offset=0; offset<64; offset++)
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{
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if (srom_wr (dc_srom_iobase, offset, *src) == -1)
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return (-1);
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src++;
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}
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return (0);
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}
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/*----------------------------------------------------------------------------*/
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