Bruce Suen 41b5c79ea0 mtd: spi-nor-ids: add xtxtech part# ... add following XTX part numbers to the list: xt25f08: 3V QSPI, 8Mbit xt25f16: 3V QSPI, 16Mbit xt25f32: 3V QSPI, 32Mbit xt25f64: 3V QSPI, 64Mbit xt25f128: 3V QSPI, 128Mbit xt25f256: 3V QSPI, 256Mbit xt25q08: 1.8V QSPI, 8Mbit xt25q16: 1.8V QSPI, 16Mbit xt25q32: 1.8V QSPI, 32Mbit xt25q64: 1.8V QSPI, 64Mbit xt25q128: 1.8V QSPI, 128Mbit xt25q256: 1.8V QSPI, 256Mbit xt25q512: 1.8V QSPI, 512Mbit xt25q01g: 1.8V QSPI, 1Gbit xt25w512: wide voltage, QSPI, 512Mbit xt25w01g: wide voltage, QSPI, 1Gbit remove xt25f128b and add xt25f128,because xt25f128b andxt25f128f share same jdec id,we use xt25f128 instead. Signed-off-by: Bruce Suen <bruce_suen@163.com> [jagan: re-edited the entire patch] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>		2023-07-13 14:13:40 +05:30
..
fsl_espi_spl.c	global: Finish CONFIG -> CFG migration	2023-01-20 12:27:24 -05:00
Kconfig	bootstd: Add a SPI flash bootdev	2023-01-23 18:11:41 -05:00
Makefile	bootstd: Add a SPI flash bootdev	2023-01-23 18:11:41 -05:00
sandbox.c	sandbox: spi: sandbox_sf_process_cmd() missing fallthrough	2023-04-28 11:30:17 -06:00
sf-uclass.c	bootstd: Add a SPI flash bootdev	2023-01-23 18:11:41 -05:00
sf_bootdev.c	bootstd: Add a new pre-scan priority for bootdevs	2023-01-23 18:11:41 -05:00
sf_dataflash.c	common: Drop display_options.h from common header	2022-08-10 13:46:55 -04:00
sf_internal.h	mtd: spi-nor-core: Add support for DTR protocol	2021-06-28 12:00:32 +05:30
sf_mtd.c	Audit <flash.h> inclusion	2022-08-04 16:18:47 -04:00
sf_probe.c	sf: Guard against zero erasesize	2023-05-11 10:25:29 +08:00
spi-nor-core.c	mtd: spi-nor-core: Add fixups for s25fs512s	2023-04-26 13:32:45 +05:30
spi-nor-ids.c	mtd: spi-nor-ids: add xtxtech part#	2023-07-13 14:13:40 +05:30
spi-nor-tiny.c	sf: Rename spi-nor-tiny functions	2023-05-11 10:25:29 +08:00