mirror of
https://github.com/AsahiLinux/u-boot
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
67 lines
1.5 KiB
C
67 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Timll DevKit3250 board support, SPL board configuration
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*
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* (C) Copyright 2015 Vladimir Zapolskiy <vz@mleia.com>
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/emc.h>
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#include <asm/arch-lpc32xx/gpio.h>
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#include <spl.h>
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static struct gpio_regs *gpio = (struct gpio_regs *)GPIO_BASE;
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/*
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* SDRAM K4S561632N-LC60 settings are selected in assumption that
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* SDRAM clock may be set up to 166 MHz, however at the moment
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* it is 104 MHz. Most delay values are converted to be a multiple of
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* base clock, and precise pinned values are not needed here.
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*/
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struct emc_dram_settings dram_64mb = {
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.cmddelay = 0x0001C000,
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.config0 = 0x00005682,
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.rascas0 = 0x00000302,
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.rdconfig = 0x00000011, /* undocumented but crucial value */
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.trp = 83333333,
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.tras = 23809524,
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.tsrex = 12500000,
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.twr = 83000000, /* tWR = tRDL = 2 CLK */
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.trc = 15384616,
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.trfc = 15384616,
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.txsr = 12500000,
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.trrd = 1,
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.tmrd = 1,
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.tcdlr = 0,
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.refresh = 130000, /* 800 clock cycles */
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.mode = 0x00018000,
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.emode = 0x02000000,
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};
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void spl_board_init(void)
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{
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/* First of all silence buzzer controlled by GPO_20 */
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writel((1 << 20), &gpio->p3_outp_clr);
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lpc32xx_uart_init(CONFIG_SYS_LPC32XX_UART);
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preloader_console_init();
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ddr_init(&dram_64mb);
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/*
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* NAND initialization is done by nand_init(),
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* here just enable NAND SLC clocks
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*/
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lpc32xx_slc_nand_init();
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}
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u32 spl_boot_device(void)
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{
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return BOOT_DEVICE_NAND;
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}
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