mirror of
https://github.com/AsahiLinux/u-boot
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
116 lines
3 KiB
C
116 lines
3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* pci.c -- esd VME8349 PCI board support.
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* Copyright (c) 2006 Wind River Systems, Inc.
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* Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
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* Copyright (c) 2009 esd gmbh.
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*
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* Reinhard Arlt <reinhard.arlt@esd-electronics.com>
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*
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* Based on MPC8349 PCI support but w/o PIB related code.
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*/
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#include <asm/mmu.h>
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#include <asm/io.h>
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#include <common.h>
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#include <mpc83xx.h>
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#include <pci.h>
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#include <i2c.h>
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#include <asm/fsl_i2c.h>
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#include "vme8349pin.h"
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static struct pci_region pci1_regions[] = {
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{
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bus_start: CONFIG_SYS_PCI1_MEM_BASE,
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phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
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size: CONFIG_SYS_PCI1_MEM_SIZE,
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flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
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},
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{
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bus_start: CONFIG_SYS_PCI1_IO_BASE,
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phys_start: CONFIG_SYS_PCI1_IO_PHYS,
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size: CONFIG_SYS_PCI1_IO_SIZE,
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flags: PCI_REGION_IO
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},
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{
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bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
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phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
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size: CONFIG_SYS_PCI1_MMIO_SIZE,
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flags: PCI_REGION_MEM
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},
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};
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/*
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* pci_init_board()
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*
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* NOTICE: PCI2 is not supported. There is only one
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* physical PCI slot on the board.
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*
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*/
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void
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pci_init_board(void)
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{
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volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
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volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
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volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
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struct pci_region *reg[] = { pci1_regions };
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u8 reg8;
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int monarch = 0;
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i2c_set_bus_num(1);
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/* Read the PCI_M66EN jumper setting */
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if ((i2c_read(CONFIG_SYS_I2C_8574_ADDR2, 0, 0, ®8, 1) == 0) ||
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(i2c_read(0x38 , 0, 0, ®8, 1) == 0)) {
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if (reg8 & 0x40) {
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clk->occr = 0xff000000; /* 66 MHz PCI */
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printf("PCI: 66MHz\n");
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} else {
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clk->occr = 0xffff0003; /* 33 MHz PCI */
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printf("PCI: 33MHz\n");
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}
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if (((reg8 & 0x01) == 0) || ((reg8 & 0x02) == 0))
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monarch = 1;
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} else {
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clk->occr = 0xffff0003; /* 33 MHz PCI */
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printf("PCI: 33MHz (I2C read failed)\n");
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}
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udelay(2000);
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/*
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* Assert/deassert VME reset
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*/
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clrsetbits_be32(&immr->gpio[1].dat,
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GPIO2_TSI_POWERUP_RESET_N | GPIO2_TSI_PLL_RESET_N,
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GPIO2_VME_RESET_N | GPIO2_L_RESET_EN_N);
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setbits_be32(&immr->gpio[1].dir, GPIO2_TSI_PLL_RESET_N |
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GPIO2_TSI_POWERUP_RESET_N |
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GPIO2_VME_RESET_N |
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GPIO2_L_RESET_EN_N);
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clrbits_be32(&immr->gpio[1].dir, GPIO2_V_SCON);
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udelay(200);
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setbits_be32(&immr->gpio[1].dat, GPIO2_TSI_PLL_RESET_N);
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udelay(200);
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setbits_be32(&immr->gpio[1].dat, GPIO2_TSI_POWERUP_RESET_N);
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udelay(600000);
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clrbits_be32(&immr->gpio[1].dat, GPIO2_L_RESET_EN_N);
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/* Configure PCI Local Access Windows */
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pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
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pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
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pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
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pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
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udelay(2000);
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if (monarch == 0) {
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mpc83xx_pci_init(1, reg);
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} else {
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/*
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* Release PCI RST Output signal
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*/
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out_be32(&immr->pci_ctrl[0].gcr, 0);
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udelay(2000);
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out_be32(&immr->pci_ctrl[0].gcr, 1);
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}
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}
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