u-boot/arch/arm/mach-k3/common_fdt.c
Emanuele Ghidoli 70aa5a94d4 arm: mach-k3: am62: Fixup CPU core, gpu and pru nodes in fdt
AM62x SoC is available in multiple variant:
- CPU cores (Cortex-A) AM62x1 (1 core), AM62x2 (2 cores), AM62x4 (4 cores)
- GPU AM625x with GPU, AM623x without GPU
- PRU (Programmable RT unit) can be present or not on AM62x2/AM62x4

Remove the relevant FDT nodes by reading the actual configuration
from the SoC registers, with that change is possible to have a single
dts/dtb file handling the different variant at runtime.
While removing GPU node and CPU nodes also the watchdog node
in the same Module Domain is removed.

A similar approach is implemented for example on i.MX8 and STM32MP1 SoC.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2023-07-21 15:32:12 -04:00

113 lines
2.9 KiB
C

// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2023 Toradex - https://www.toradex.com/
*/
#include "common.h"
#include <dm.h>
#include <fdt_support.h>
#include <linux/soc/ti/ti_sci_protocol.h>
static int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name)
{
u64 msmc_start = 0, msmc_end = 0, msmc_size, reg[2];
struct ti_sci_handle *ti_sci = get_ti_sci_handle();
int ret, node, subnode, len, prev_node;
u32 range[4], addr, size;
const fdt32_t *sub_reg;
ti_sci->ops.core_ops.query_msmc(ti_sci, &msmc_start, &msmc_end);
msmc_size = msmc_end - msmc_start + 1;
debug("%s: msmc_start = 0x%llx, msmc_size = 0x%llx\n", __func__,
msmc_start, msmc_size);
/* find or create "msmc_sram node */
ret = fdt_path_offset(blob, parent_path);
if (ret < 0)
return ret;
node = fdt_find_or_add_subnode(blob, ret, node_name);
if (node < 0)
return node;
ret = fdt_setprop_string(blob, node, "compatible", "mmio-sram");
if (ret < 0)
return ret;
reg[0] = cpu_to_fdt64(msmc_start);
reg[1] = cpu_to_fdt64(msmc_size);
ret = fdt_setprop(blob, node, "reg", reg, sizeof(reg));
if (ret < 0)
return ret;
fdt_setprop_cell(blob, node, "#address-cells", 1);
fdt_setprop_cell(blob, node, "#size-cells", 1);
range[0] = 0;
range[1] = cpu_to_fdt32(msmc_start >> 32);
range[2] = cpu_to_fdt32(msmc_start & 0xffffffff);
range[3] = cpu_to_fdt32(msmc_size);
ret = fdt_setprop(blob, node, "ranges", range, sizeof(range));
if (ret < 0)
return ret;
subnode = fdt_first_subnode(blob, node);
prev_node = 0;
/* Look for invalid subnodes and delete them */
while (subnode >= 0) {
sub_reg = fdt_getprop(blob, subnode, "reg", &len);
addr = fdt_read_number(sub_reg, 1);
sub_reg++;
size = fdt_read_number(sub_reg, 1);
debug("%s: subnode = %d, addr = 0x%x. size = 0x%x\n", __func__,
subnode, addr, size);
if (addr + size > msmc_size ||
!strncmp(fdt_get_name(blob, subnode, &len), "sysfw", 5) ||
!strncmp(fdt_get_name(blob, subnode, &len), "l3cache", 7)) {
fdt_del_node(blob, subnode);
debug("%s: deleting subnode %d\n", __func__, subnode);
if (!prev_node)
subnode = fdt_first_subnode(blob, node);
else
subnode = fdt_next_subnode(blob, prev_node);
} else {
prev_node = subnode;
subnode = fdt_next_subnode(blob, prev_node);
}
}
return 0;
}
int fdt_fixup_msmc_ram_k3(void *blob)
{
int ret;
ret = fdt_fixup_msmc_ram(blob, "/bus@100000", "sram@70000000");
if (ret < 0)
ret = fdt_fixup_msmc_ram(blob, "/interconnect@100000",
"sram@70000000");
if (ret)
printf("%s: fixing up msmc ram failed %d\n", __func__, ret);
return ret;
}
int fdt_del_node_path(void *blob, const char *path)
{
int ret;
int nodeoff;
nodeoff = fdt_path_offset(blob, path);
if (nodeoff < 0)
return 0; /* Not found, skip it */
ret = fdt_del_node(blob, nodeoff);
if (ret < 0)
printf("Unable to delete node %s, err=%s\n", path, fdt_strerror(ret));
else
debug("Deleted node %s\n", path);
return ret;
}