mirror of
https://github.com/AsahiLinux/u-boot
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
79 lines
2.2 KiB
C
79 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Common definitions for LPC32XX board configurations
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*
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* Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
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*/
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#ifndef _LPC32XX_CONFIG_H
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#define _LPC32XX_CONFIG_H
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/* Basic CPU architecture */
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_NR_DRAM_BANKS_MAX 2
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/* UART configuration */
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#if (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \
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(CONFIG_SYS_LPC32XX_UART == 7)
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#if !defined(CONFIG_LPC32XX_HSUART)
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#define CONFIG_LPC32XX_HSUART
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#endif
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#endif
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#if !defined(CONFIG_SYS_NS16550_CLK)
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#define CONFIG_SYS_NS16550_CLK 13000000
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#endif
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#define CONFIG_SYS_BAUDRATE_TABLE \
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{ 9600, 19200, 38400, 57600, 115200, 230400, 460800 }
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/* Ethernet */
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#define LPC32XX_ETH_BASE ETHERNET_BASE
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/* NAND */
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#if defined(CONFIG_NAND_LPC32XX_SLC)
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#define NAND_LARGE_BLOCK_PAGE_SIZE 0x800
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#define NAND_SMALL_BLOCK_PAGE_SIZE 0x200
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#if !defined(CONFIG_SYS_NAND_PAGE_SIZE)
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#define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE
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#endif
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#if (CONFIG_SYS_NAND_PAGE_SIZE == NAND_LARGE_BLOCK_PAGE_SIZE)
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
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48, 49, 50, 51, 52, 53, 54, 55, \
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56, 57, 58, 59, 60, 61, 62, 63, }
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
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#elif (CONFIG_SYS_NAND_PAGE_SIZE == NAND_SMALL_BLOCK_PAGE_SIZE)
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#define CONFIG_SYS_NAND_OOBSIZE 16
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#define CONFIG_SYS_NAND_ECCPOS { 10, 11, 12, 13, 14, 15, }
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
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#else
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#error "CONFIG_SYS_NAND_PAGE_SIZE set to an invalid value"
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#endif
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#define CONFIG_SYS_NAND_ECCSIZE 0x100
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#define CONFIG_SYS_NAND_ECCBYTES 3
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#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
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CONFIG_SYS_NAND_PAGE_SIZE)
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#endif /* CONFIG_NAND_LPC32XX_SLC */
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/* NOR Flash */
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#if defined(CONFIG_SYS_FLASH_CFI)
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_PROTECTION
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#endif
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/* USB OHCI */
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#if defined(CONFIG_USB_OHCI_LPC32XX)
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
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#define CONFIG_SYS_USB_OHCI_REGS_BASE USB_BASE
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "lpc32xx-ohci"
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#endif
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#endif /* _LPC32XX_CONFIG_H */
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