mirror of
https://github.com/AsahiLinux/u-boot
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36a75344d7
- Switch to using the omap3-u-boot.dtsi file for needed properties - Enable SPL_OF_CONTROL This commit is based on the following series: https://patchwork.ozlabs.org/project/uboot/list/?series=92472 https://patchwork.ozlabs.org/project/uboot/list/?series=92462 Signed-off-by: Derald D. Woods <woods.technical@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
341 lines
8.1 KiB
C
341 lines
8.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2004-2011
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* Texas Instruments, <www.ti.com>
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*
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* Author :
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* Manikandan Pillai <mani.pillai@ti.com>
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*
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* Derived from Beagle Board and 3430 SDP code by
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* Richard Woodruff <r-woodruff2@ti.com>
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* Syed Mohammed Khasim <khasim@ti.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <ns16550.h>
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#include <netdev.h>
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#include <asm/io.h>
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#include <asm/arch/mem.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/gpio.h>
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#include <i2c.h>
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#include <twl4030.h>
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#include <asm/mach-types.h>
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#include <asm/omap_musb.h>
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#include <linux/mtd/rawnand.h>
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#include <linux/usb/ch9.h>
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#include <linux/usb/gadget.h>
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#include <linux/usb/musb.h>
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#include "evm.h"
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#ifdef CONFIG_USB_EHCI_HCD
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#include <usb.h>
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#include <asm/ehci-omap.h>
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#endif
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#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
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#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
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DECLARE_GLOBAL_DATA_PTR;
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static u32 omap3_evm_version;
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u32 get_omap3_evm_rev(void)
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{
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return omap3_evm_version;
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}
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static void omap3_evm_get_revision(void)
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{
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#if defined(CONFIG_CMD_NET)
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/*
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* Board revision can be ascertained only by identifying
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* the Ethernet chipset.
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*/
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unsigned int smsc_id;
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/* Ethernet PHY ID is stored at ID_REV register */
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smsc_id = readl(CONFIG_SMC911X_BASE + 0x50) & 0xFFFF0000;
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printf("Read back SMSC id 0x%x\n", smsc_id);
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switch (smsc_id) {
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/* SMSC9115 chipset */
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case 0x01150000:
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omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
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break;
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/* SMSC 9220 chipset */
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case 0x92200000:
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default:
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omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
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}
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#else /* !CONFIG_CMD_NET */
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#if defined(CONFIG_STATIC_BOARD_REV)
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/* Look for static defintion of the board revision */
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omap3_evm_version = CONFIG_STATIC_BOARD_REV;
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#else
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/* Fallback to the default above */
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omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
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#endif /* CONFIG_STATIC_BOARD_REV */
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#endif /* CONFIG_CMD_NET */
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}
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#if defined(CONFIG_USB_MUSB_GADGET) || defined(CONFIG_USB_MUSB_HOST)
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/* MUSB port on OMAP3EVM Rev >= E requires extvbus programming. */
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u8 omap3_evm_need_extvbus(void)
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{
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u8 retval = 0;
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if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
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retval = 1;
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return retval;
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}
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#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
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/*
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* Routine: board_init
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* Description: Early hardware init.
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*/
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int board_init(void)
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{
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gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
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/* board id for Linux */
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gd->bd->bi_arch_number = MACH_TYPE_OMAP3EVM;
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/* boot param addr */
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gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
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return 0;
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}
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#if defined(CONFIG_SPL_OS_BOOT)
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int spl_start_uboot(void)
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{
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/* break into full u-boot on 'c' */
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if (serial_tstc() && serial_getc() == 'c')
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return 1;
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return 0;
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}
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#endif /* CONFIG_SPL_OS_BOOT */
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#if defined(CONFIG_SPL_BUILD)
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/*
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* Routine: get_board_mem_timings
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* Description: If we use SPL then there is no x-loader nor config header
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* so we have to setup the DDR timings ourself on the first bank. This
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* provides the timing values back to the function that configures
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* the memory.
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*/
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void get_board_mem_timings(struct board_sdrc_timings *timings)
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{
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int pop_mfr, pop_id;
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/*
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* We need to identify what PoP memory is on the board so that
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* we know what timings to use. To map the ID values please see
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* nand_ids.c
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*/
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identify_nand_chip(&pop_mfr, &pop_id);
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if (pop_mfr == NAND_MFR_HYNIX && pop_id == 0xbc) {
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/* 256MB DDR */
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timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
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timings->ctrla = HYNIX_V_ACTIMA_200;
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timings->ctrlb = HYNIX_V_ACTIMB_200;
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} else {
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/* 128MB DDR */
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timings->mcfg = MICRON_V_MCFG_165(128 << 20);
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timings->ctrla = MICRON_V_ACTIMA_165;
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timings->ctrlb = MICRON_V_ACTIMB_165;
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}
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timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
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timings->mr = MICRON_V_MR_165;
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}
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#endif /* CONFIG_SPL_BUILD */
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#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
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static struct musb_hdrc_config musb_config = {
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.multipoint = 1,
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.dyn_fifo = 1,
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.num_eps = 16,
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.ram_bits = 12,
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};
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static struct omap_musb_board_data musb_board_data = {
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.interface_type = MUSB_INTERFACE_ULPI,
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};
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static struct musb_hdrc_platform_data musb_plat = {
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#if defined(CONFIG_USB_MUSB_HOST)
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.mode = MUSB_HOST,
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#elif defined(CONFIG_USB_MUSB_GADGET)
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.mode = MUSB_PERIPHERAL,
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#else
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#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
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#endif /* CONFIG_USB_MUSB_{GADGET,HOST} */
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.config = &musb_config,
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.power = 100,
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.platform_ops = &omap2430_ops,
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.board_data = &musb_board_data,
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};
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#endif /* CONFIG_USB_MUSB_OMAP2PLUS */
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/*
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* Routine: misc_init_r
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* Description: Init ethernet (done here so udelay works)
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*/
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int misc_init_r(void)
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{
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twl4030_power_init();
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#ifdef CONFIG_SYS_I2C_OMAP24XX
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i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
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#endif
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#if defined(CONFIG_CMD_NET)
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setup_net_chip();
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#endif
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omap3_evm_get_revision();
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#if defined(CONFIG_CMD_NET)
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reset_net_chip();
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#endif
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omap_die_id_display();
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#if defined(CONFIG_USB_MUSB_OMAP2PLUS)
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musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
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#endif
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#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
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omap_die_id_usbethaddr();
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#endif
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return 0;
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}
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/*
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* Routine: set_muxconf_regs
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* Description: Setting up the configuration Mux registers specific to the
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* hardware. Many pins need to be moved from protect to primary
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* mode.
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*/
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void set_muxconf_regs(void)
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{
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MUX_EVM();
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}
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#if defined(CONFIG_CMD_NET)
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/*
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* Routine: setup_net_chip
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* Description: Setting up the configuration GPMC registers specific to the
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* Ethernet hardware.
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*/
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static void setup_net_chip(void)
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{
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struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
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/* Configure GPMC registers */
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writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
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writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
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writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
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writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
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writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
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writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
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writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
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/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
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writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
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/* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
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writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
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/* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
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writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
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&ctrl_base->gpmc_nadv_ale);
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}
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/**
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* Reset the ethernet chip.
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*/
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static void reset_net_chip(void)
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{
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int ret;
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int rst_gpio;
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if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) {
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rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN1;
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} else {
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rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN2;
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}
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ret = gpio_request(rst_gpio, "");
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if (ret < 0) {
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printf("Unable to get GPIO %d\n", rst_gpio);
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return ;
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}
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/* Configure as output */
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gpio_direction_output(rst_gpio, 0);
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/* Send a pulse on the GPIO pin */
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gpio_set_value(rst_gpio, 1);
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udelay(1);
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gpio_set_value(rst_gpio, 0);
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udelay(1);
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gpio_set_value(rst_gpio, 1);
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}
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int board_eth_init(bd_t *bis)
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{
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#if defined(CONFIG_SMC911X)
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env_set("ethaddr", NULL);
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return smc911x_initialize(0, CONFIG_SMC911X_BASE);
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#else
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return 0;
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#endif
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}
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#endif /* CONFIG_CMD_NET */
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#if defined(CONFIG_MMC)
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int board_mmc_init(bd_t *bis)
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{
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return omap_mmc_init(0, 0, 0, -1, -1);
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}
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void board_mmc_power_init(void)
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{
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twl4030_power_mmc_init(0);
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}
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#endif /* CONFIG_MMC */
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#if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD)
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/* Call usb_stop() before starting the kernel */
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void show_boot_progress(int val)
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{
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if (val == BOOTSTAGE_ID_RUN_OS)
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usb_stop();
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}
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static struct omap_usbhs_board_data usbhs_bdata = {
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.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
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.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
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.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
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};
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int ehci_hcd_init(int index, enum usb_init_type init,
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struct ehci_hccr **hccr, struct ehci_hcor **hcor)
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{
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return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
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}
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int ehci_hcd_stop(int index)
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{
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return omap_ehci_hcd_stop();
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}
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#endif /* CONFIG_USB_EHCI_HCD */
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#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) && !defined(CONFIG_CMD_NET)
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int board_eth_init(bd_t *bis)
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{
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return usb_eth_initialize(bis);
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}
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#endif /* CONFIG_USB_ETHER */
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