u-boot/arch/arm/dts/rk3568-nanopi-r5c.dts
Jonas Karlman 5b155997d4 rockchip: rk3568-nanopi-r5: Update defconfig for NanoPi R5C and R5S
Update and sync Kconfig options for NanoPi R5C and NanoPi R5S with other
RK3568 boards.

SPL_FIT_SIGNATURE is enabled to add a checksum validation of the FIT
payload, also add LEGACY_IMAGE_FORMAT to keep boot scripts working.

OF_SPL_REMOVE_PROPS, SPL_DM_SEQ_ALIAS and SPL_PINCTRL change ensure
pinctrl for eMMC, SD-card and UART2 is applied in SPL.

MMC_HS200_SUPPORT and SPL counterpart is enabled to speed up eMMC load
times from on-board eMMC 5.1 modules.

Drop remaining unused or unsupported options to sync with other RK3568
boards.

Also sync device tree from linux v6.4 and drop u-boot,spl-boot-order and
use the default from rk356x-u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-07 10:23:32 +08:00

112 lines
2.4 KiB
Text

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
* (http://www.friendlyelec.com)
*
* Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
*/
/dts-v1/;
#include "rk3568-nanopi-r5s.dtsi"
/ {
model = "FriendlyElec NanoPi R5C";
compatible = "friendlyarm,nanopi-r5c", "rockchip,rk3568";
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&reset_button_pin>;
button-reset {
debounce-interval = <50>;
gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
label = "reset";
linux,code = <KEY_RESTART>;
};
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&lan_led_pin>, <&power_led_pin>, <&wan_led_pin>, <&wlan_led_pin>;
led-lan {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
};
power_led: led-power {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_POWER;
linux,default-trigger = "heartbeat";
gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
};
led-wan {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN;
gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
};
led-wlan {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN;
gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
};
};
};
&pcie2x1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie20_reset_pin>;
reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&pcie3x1 {
num-lanes = <1>;
reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};
&pcie3x2 {
num-lanes = <1>;
reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};
&pinctrl {
gpio-leds {
lan_led_pin: lan-led-pin {
rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
power_led_pin: power-led-pin {
rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
wan_led_pin: wan-led-pin {
rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
wlan_led_pin: wlan-led-pin {
rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie {
pcie20_reset_pin: pcie20-reset-pin {
rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
rockchip-key {
reset_button_pin: reset-button-pin {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};