Phil Sutter 9a04527840 drivers/pci/pci_mvebu: Fix for boards with X4 lanes ... Armada XP has support for X4 lanes, boards specify this in their serdes_cfg. During PEX init in high_speed_env_lib.c, the configuration is stored in GEN_PURP_RES_2_REG. When enumerating PEX, subsequent interfaces of an X4 lane must be skipped. Otherwise the enumeration hangs up the board. The way this is implemented here is not exactly beautiful, but it mimics how Marvell's BSP does it. Alternatively we could get the information using board_serdes_cfg_get(), but that won't lead to clean code, either. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>		2016-01-14 14:08:59 +01:00
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config.h	arm: mvebu: Move SoC selection (A38X vs AXP) into Kconfig	2016-01-14 14:08:59 +01:00
cpu.h	arm: mvebu: Print CPU and SDRAM frequency upon startup	2016-01-14 14:08:59 +01:00
gpio.h	arm: mvebu: Add SDIO/SDHCI support for Armada A38x	2015-07-10 14:54:09 +02:00
soc.h	drivers/pci/pci_mvebu: Fix for boards with X4 lanes	2016-01-14 14:08:59 +01:00