2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-12-14 15:23:07 +00:00
u-boot/arch/arm/dts/sun8i-r16-nintendo-nes-classic.dts
Samuel Holland 70f24fa02b ARM: dts: sunxi: A13/A31/A23/A33: Sync from Linux v5.18-rc1
Copy the devicetree source for the A10s/A13/GR8, A31(s), and A23/A33/R16
SoCs and all existing boards from the Linux v5.18-rc1 tag.

These changes are combined into one commit due to interdependencies:
 - The unit addresses were removed from bitbanged I2C buses, which
   drives a Kconfig default change. This affects sun5i-a13-utoo-p66.dts
   and sun6i-a31-colombus.dts.
 - The pinctrl nodes were renamed, including some used by the shared
   header sunxi-reference-design-tablet.dtsi.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.

This commit renames the file sun8i-r16-nintendo-nes-classic-edition.dts
to sun8i-r16-nintendo-nes-classic.dts to match the Linux tree.

This commit also adds the following new board devicetrees:
 - sun5i-a13-licheepi-one.dts
 - sun5i-a13-pocketbook-touch-lux-3.dts
 - sun5i-gr8-evb.dts
 - sun8i-a23-ippo-q8h-v1.2.dts
 - sun8i-a23-ippo-q8h-v5.dts
 - sun8i-a33-et-q8-v1.6.dts
 - sun8i-a33-ippo-q8h-v1.2.dts
 - sun8i-r16-nintendo-super-nes-classic.dts

As with the other SoCs, updates of note are conversion of GPIO pull-up
from pinconf to GPIO flags and renaming the detection GPIO properties in
the USB PHY nodes.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23 00:37:51 +01:00

54 lines
1,016 B
Text

// SPDX-License-Identifier: GPL-2.0 OR X11
/* Copyright (c) 2016 FUKAUMI Naoki <naobsd@gmail.com> */
/dts-v1/;
#include "sun8i-a33.dtsi"
#include "sunxi-common-regulators.dtsi"
/ {
model = "Nintendo NES Classic Edition";
compatible = "nintendo,nes-classic", "allwinner,sun8i-r16",
"allwinner,sun8i-a33";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&uart0 {
/*
* UART0 is available on two ports: PB and PF, both are accessible.
* PF can also be used for the SD card so PB is preferred.
*/
pinctrl-names = "default";
pinctrl-0 = <&uart0_pf_pins>;
status = "okay";
};
&nfc {
status = "okay";
/* 2Gb Macronix MX30LF2G18AC (3V) */
nand@0 {
reg = <0>;
allwinner,rb = <0>;
nand-ecc-mode = "hw";
nand-ecc-strength = <16>;
nand-ecc-step-size = <1024>;
};
};
&usb_otg {
status = "okay";
dr_mode = "otg";
};
&usbphy {
/* VBUS is always on because it is wired to the power supply */
usb1_vbus-supply = <&reg_vcc5v0>;
status = "okay";
};