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https://github.com/AsahiLinux/u-boot
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f14ae4180a
This patch brings the lwmon5 board support up-to-date. Here a summary of the changes: lwmon5 board port related: - GPIO's changed to control the LSB transmitter - Reset USB PHY's upon power-up - Enable CAN upon power-up - USB init error workaround (errata CHIP_6) - EBC: Enable burstmode and modify the timings for the GDC memory - EBC: Speed up NOR flash timings lwmon5 board POST related: - Add FPGA memory test - Add GDC memory test - DSP POST reworked - SYSMON POST: Fix handling of negative temperatures - Add output for sysmon1 POST - HW-watchdog min. time test reworked Additionally some coding-style changes were done. Signed-off-by: Sascha Laue <sascha.laue@liebherr.com> Signed-off-by: Stefan Roese <sr@denx.de>
137 lines
3.8 KiB
C
137 lines
3.8 KiB
C
/*
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* (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
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*
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* Developed for DENX Software Engineering GmbH
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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/* This test verifies if the reason of last reset was an abnormal voltage
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* condition, than it performs watchdog test, measuing time required to
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* trigger watchdog reset.
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*/
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#include <post.h>
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#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
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#include <watchdog.h>
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#include <asm/ppc4xx-gpio.h>
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#include <asm/io.h>
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static uint watchdog_magic_read(void)
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{
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return in_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR) &
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CONFIG_SYS_WATCHDOG_MAGIC_MASK;
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}
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static void watchdog_magic_write(uint value)
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{
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out_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR, value |
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(in_be32((void *)CONFIG_SYS_WATCHDOG_FLAGS_ADDR) &
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~CONFIG_SYS_WATCHDOG_MAGIC_MASK));
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}
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int sysmon1_post_test(int flags)
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{
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if (gpio_read_in_bit(CONFIG_SYS_GPIO_SYSMON_STATUS) == 0) {
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/*
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* 3.1. GPIO62 is low
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* Assuming system voltage failure.
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*/
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post_log("sysmon1 Abnormal voltage detected (GPIO62)\n");
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post_log("POST sysmon1 FAILED\n");
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return 1;
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} else {
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post_log("sysmon1 PASSED\n");
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}
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return 0;
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}
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int lwmon5_watchdog_post_test(int flags)
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{
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/* On each reset scratch register 1 should be tested,
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* but first test GPIO62:
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*/
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if (!(flags & POST_MANUAL) && sysmon1_post_test(flags)) {
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/* 3.1. GPIO62 is low
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* Assuming system voltage failure.
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*/
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/* 3.1.1. Set scratch register 1 to 0x0000xxxx */
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watchdog_magic_write(0);
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/* 3.1.2. Mark test as failed due to voltage?! */
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return 1;
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}
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if (watchdog_magic_read() != CONFIG_SYS_WATCHDOG_MAGIC) {
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/* 3.2. Scratch register 1 differs from magic value 0x1248xxxx
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* Assuming PowerOn
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*/
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int ints;
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ulong base;
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ulong time;
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/* 3.2.1. Set magic value to scratch register */
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watchdog_magic_write(CONFIG_SYS_WATCHDOG_MAGIC);
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ints = disable_interrupts ();
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/* 3.2.2. strobe watchdog once */
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WATCHDOG_RESET();
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out_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR, 0);
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/* 3.2.3. save time of strobe in scratch register 2 */
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base = post_time_ms (0);
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/* 3.2.4. Wait for 150 ms (enough for reset to happen) */
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while ((time = post_time_ms (base)) < 150)
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out_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR, time);
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if (ints)
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enable_interrupts ();
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/* 3.2.5. Reset didn't happen. - Set 0x0000xxxx
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* into scratch register 1
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*/
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watchdog_magic_write(0);
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/* 3.2.6. Mark test as failed. */
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post_log("hw watchdog time : %u ms, failed ", time);
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return 2;
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} else {
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/* 3.3. Scratch register matches magic value 0x1248xxxx
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* Assume this is watchdog-initiated reset
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*/
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ulong time;
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/* 3.3.1. So, the test succeed, save measured time to syslog. */
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time = in_be32((void *)CONFIG_SYS_WATCHDOG_TIME_ADDR);
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if (time > 90 ) { /* ms*/
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post_log("hw watchdog time : %u ms, passed ", time);
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/* 3.3.2. Set scratch register 1 to 0x0000xxxx */
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watchdog_magic_write(0);
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return 0;
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} else {
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/*test minimum watchdogtime */
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post_log("hw watchdog time : %u ms, failed ", time);
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return 2;
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}
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}
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return -1;
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}
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#endif /* CONFIG_POST & CONFIG_SYS_POST_WATCHDOG */
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