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https://github.com/AsahiLinux/u-boot
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7f54b83870
Add support for hardware watchdog timer on all Cortina Access CAxxxx family of SoCs. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Jason Li <jason.li@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
139 lines
2.9 KiB
C
139 lines
2.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2020 Cortina-Access
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*
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*/
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#include <common.h>
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#include <dm.h>
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#include <hang.h>
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#include <asm/io.h>
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#include <wdt.h>
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#include <linux/bitops.h>
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#define CA_WDT_CTRL 0x00
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#define CA_WDT_PS 0x04
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#define CA_WDT_DIV 0x08
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#define CA_WDT_LD 0x0C
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#define CA_WDT_LOADE 0x10
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#define CA_WDT_CNT 0x14
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#define CA_WDT_IE 0x18
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#define CA_WDT_INT 0x1C
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#define CA_WDT_STAT 0x20
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/* CA_WDT_CTRL */
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#define CTL_WDT_EN BIT(0)
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#define CTL_WDT_RSTEN BIT(1)
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#define CTL_WDT_CLK_SEL BIT(2)
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/* CA_WDT_LOADE */
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#define WDT_UPD BIT(0)
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#define WDT_UPD_PS BIT(1)
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/* Global config */
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#define WDT_RESET_SUB BIT(4)
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#define WDT_RESET_ALL_BLOCK BIT(6)
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#define WDT_RESET_REMAP BIT(7)
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#define WDT_EXT_RESET BIT(8)
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#define WDT_RESET_DEFAULT (WDT_EXT_RESET | WDT_RESET_REMAP | \
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WDT_RESET_ALL_BLOCK | WDT_RESET_SUB)
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struct ca_wdt_priv {
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void __iomem *base;
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void __iomem *global_config;
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};
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static void cortina_wdt_set_timeout(struct udevice *dev, u64 timeout_ms)
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{
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struct ca_wdt_priv *priv = dev_get_priv(dev);
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/* Prescale using millisecond unit */
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writel(CORTINA_PER_IO_FREQ / 1000, priv->base + CA_WDT_PS);
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/* Millisecond */
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writel(1, priv->base + CA_WDT_DIV);
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writel(timeout_ms, priv->base + CA_WDT_LD);
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writel(WDT_UPD | WDT_UPD_PS, priv->base + CA_WDT_LOADE);
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}
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static int cortina_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
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{
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struct ca_wdt_priv *priv = dev_get_priv(dev);
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cortina_wdt_set_timeout(dev, timeout);
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/* WDT Reset option */
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setbits_32(priv->global_config, WDT_RESET_DEFAULT);
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/* Enable WDT */
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setbits_32(priv->base, CTL_WDT_EN | CTL_WDT_RSTEN | CTL_WDT_CLK_SEL);
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return 0;
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}
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static int cortina_wdt_stop(struct udevice *dev)
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{
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struct ca_wdt_priv *priv = dev_get_priv(dev);
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/* Disable WDT */
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writel(0, priv->base);
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return 0;
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}
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static int cortina_wdt_reset(struct udevice *dev)
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{
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struct ca_wdt_priv *priv = dev_get_priv(dev);
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/* Reload WDT counter */
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writel(WDT_UPD, priv->base + CA_WDT_LOADE);
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return 0;
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}
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static int cortina_wdt_expire_now(struct udevice *dev, ulong flags)
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{
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/* Set 1ms timeout to reset system */
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cortina_wdt_set_timeout(dev, 1);
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hang();
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return 0;
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}
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static int cortina_wdt_probe(struct udevice *dev)
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{
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struct ca_wdt_priv *priv = dev_get_priv(dev);
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priv->base = dev_remap_addr_index(dev, 0);
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if (!priv->base)
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return -ENOENT;
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priv->global_config = dev_remap_addr_index(dev, 1);
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if (!priv->global_config)
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return -ENOENT;
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/* Stop WDT */
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cortina_wdt_stop(dev);
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return 0;
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}
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static const struct wdt_ops cortina_wdt_ops = {
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.start = cortina_wdt_start,
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.reset = cortina_wdt_reset,
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.stop = cortina_wdt_stop,
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.expire_now = cortina_wdt_expire_now,
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};
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static const struct udevice_id cortina_wdt_ids[] = {
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{.compatible = "cortina,ca-wdt"},
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{}
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};
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U_BOOT_DRIVER(cortina_wdt) = {
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.name = "cortina_wdt",
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.id = UCLASS_WDT,
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.probe = cortina_wdt_probe,
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.of_match = cortina_wdt_ids,
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.ops = &cortina_wdt_ops,
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};
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