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cd16c57bd0
Unlike the other clock types, in the case of the gated clock, a new driver has been developed which does not use the registering routine provided by the common clock framework. The addition of the ecspi0 clock to sandbox therefore allows testing the ccf gate clock. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
88 lines
2.3 KiB
C
88 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2019
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* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
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*/
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#ifndef __SANDBOX_CLK_H__
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#define __SANDBOX_CLK_H__
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#include <linux/clk-provider.h>
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enum {
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SANDBOX_CLK_PLL2 = 1,
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SANDBOX_CLK_PLL3,
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SANDBOX_CLK_PLL3_60M,
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SANDBOX_CLK_PLL3_80M,
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SANDBOX_CLK_ECSPI_ROOT,
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SANDBOX_CLK_ECSPI0,
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SANDBOX_CLK_ECSPI1,
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SANDBOX_CLK_USDHC1_SEL,
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SANDBOX_CLK_USDHC2_SEL,
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SANDBOX_CLK_I2C,
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SANDBOX_CLK_I2C_ROOT,
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};
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enum sandbox_pllv3_type {
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SANDBOX_PLLV3_GENERIC,
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SANDBOX_PLLV3_USB,
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};
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struct clk *sandbox_clk_pllv3(enum sandbox_pllv3_type type, const char *name,
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const char *parent_name, void __iomem *base,
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u32 div_mask);
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static inline struct clk *sandbox_clk_fixed_factor(const char *name,
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const char *parent,
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unsigned int mult,
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unsigned int div)
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{
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return clk_register_fixed_factor(NULL, name, parent,
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CLK_SET_RATE_PARENT, mult, div);
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}
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static inline struct clk *sandbox_clk_divider(const char *name,
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const char *parent,
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void __iomem *reg, u8 shift,
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u8 width)
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{
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return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
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reg, shift, width, 0);
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}
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static inline struct clk *sandbox_clk_gate(const char *name, const char *parent,
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void __iomem *reg, u8 bit_idx,
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u8 clk_gate_flags)
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{
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return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT,
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reg, bit_idx, clk_gate_flags, NULL);
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}
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struct clk *sandbox_clk_register_gate2(struct device *dev, const char *name,
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const char *parent_name,
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unsigned long flags,
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void __iomem *reg, u8 bit_idx,
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u8 cgr_val, u8 clk_gate_flags);
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static inline struct clk *sandbox_clk_gate2(const char *name,
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const char *parent,
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void __iomem *reg, u8 shift)
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{
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return sandbox_clk_register_gate2(NULL, name, parent,
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CLK_SET_RATE_PARENT, reg, shift,
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0x3, 0);
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}
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static inline struct clk *sandbox_clk_mux(const char *name, void __iomem *reg,
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u8 shift, u8 width,
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const char * const *parents,
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int num_parents)
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{
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return clk_register_mux(NULL, name, parents, num_parents,
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CLK_SET_RATE_NO_REPARENT, reg, shift,
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width, 0);
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}
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int sandbox_clk_enable_count(struct clk *clk);
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#endif /* __SANDBOX_CLK_H__ */
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