Patrick Delaunay a46dce2817 ram: stm32mp1: add support of STM32MP13x ... Add support for new compatible "st,stm32mp13-ddr" to manage the DDR sub system (Controller and PHY) in STM32MP13x SOC: - only one AXI port - support of 16 port output (MEMC_DRAM_DATA_WIDTH = 2) The STM32MP15x SOC have 2 AXI ports and 32 bits support. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>		2022-06-17 10:41:16 +02:00
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k3-am654-ddrss.txt	WS cleanup: remove SPACE(s) followed by TAB	2021-09-30 09:08:16 -04:00
st,stm32mp1-ddr.txt	ram: stm32mp1: add support of STM32MP13x	2022-06-17 10:41:16 +02:00